SA25F010 Saifun, SA25F010 Datasheet

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SA25F010

Manufacturer Part Number
SA25F010
Description
1Mb Serial Flash
Manufacturer
Saifun
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
SA25F010LMNFX
Manufacturer:
SAIFUN
Quantity:
20 000
Features
Saifun NROM
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This Data Sheet states Saifun's current technical specifications regarding the Products described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Saifun NROM™ Flash Cell
Serial Peripheral Interface (SPI) Compatible,
Supports SPI Modes 0 (0,0) and 3 (1,1)
Page Program Operation:
Page Program Mode (up to 256 bytes) in 9ms Typical
Page Erase (256 bytes) in 3 ms
Sector Erase (256 Kb) in 0.3 s
Bulk Erase (1 Mb)
Single Supply Voltage: 2.7 V to 3.6 V
25MHz Clock Rate
Block Write Protection: Protect Quarter, Half or Entire Array
Write Protect Pin and Write Disable Instructions of Both
Hardware and Software Data Protection
100,000 Erase Cycles (Minimum)
More than 20-Year Data Retention
Low-power Standby Current (less than 1 A)
8-SOIC Narrow Package
MLF Leadless Package
Temperature Range:
512 pages (256 Bytes/Page)
Single Page Rewrite Cycle (Erase and Program) in 10ms
Typical
Industrial: -40°C to +85°C
Commercial: 0°C to +70°C
TM
is a trademark of Saifun Semiconductors Ltd.
http://www.saifun.com
with 25MHz SPI Bus
1Mb Serial Flash
Information
SA25F010
Advanced
Publication# 1985
Issue Date: 24 July 2003
Interface
www.DataSheet4U.com
Rev: 1
Amendment: 0

Related parts for SA25F010

SA25F010 Summary of contents

Page 1

... Saifun Semiconductors Ltd. This Data Sheet states Saifun's current technical specifications regarding the Products described herein. This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. www.DataSheet4U.com SA25F010 Advanced Information 1Mb Serial Flash with 25MHz SPI Bus ...

Page 2

... The SA25F010 transfer space-saving, 8-lead narrow SOIC package The SA25F010 is part of the SPI Flash and EEPROM family designed to work with any SPI-compatible, microcontroller, and offers both hardware (WPb pin) and Software (“block protect”) data protection. For example, programming a 2-bit code into the status register prevents program with top ¼ ...

Page 3

... SPI Modes ............................................................ 14 Master ........................................................... 14 Slave ............................................................. 14 Transmitter/Receiver ..................................... 14 Serial Opcode................................................ 14 Invalid Opcode .............................................. 14 Chip Select (CSb).......................................... 14 Hold Condition............................................... 15 Write Protect ................................................. 16 SA25F010 Advanced Information www.DataSheet4U.com Functional Description ............................................... 17 Instructions............................................................ 17 Read Status Register (RDSR) ............................... 18 Write Enable (WREN) ........................................... 20 Write Disable (WRDI)............................................ 20 Write Status Register (WRSR) .............................. 21 Read Data Bytes (READ) ...................................... 23 Fast Read (FAST_READ) ...

Page 4

... List of Figures Figure 1. SA25F010 Block Diagram ................................ 5 Figure 2. SOIC 8 (150 mil)/PDIP/MLF Package (Top View) ............................................................. 6 Figure 3. SA25F010 Ordering Information....................... 7 Figure 4. SPI Mode 0 (0,0) Input Timing........................ 11 Figure 5. SPI Mode 0 (0,0) Output Timing ..................... 11 Figure 6. AC Measurements I/O Waveform................... 12 Figure 7. Supported SPI Modes .................................... 14 Figure 8. Hold Condition................................................ 15 Figure 9. SPI Serial Interface ........................................ 17 Figure 10 ...

Page 5

... Table 1 = 512 pages (256 bytes each) SRAM Logic Each page programmed, with the bits programmed from The SA25F010's memory can be erased via the Page, Sector or Bulk Erase commands, with the bits erased from Table 1. Memory Organization Sector Address Range ...

Page 6

... HOLDb SO 2 SA25F010 WPb 3 6 SCK 5 SI GND 4 Table 2. Pin Names Signal Name CSb Chip Select SCK Serial Data Clock SI Serial Data Input SO Serial Data Output GND Ground V Power Supply CC WPb Write Protect Suspend Serial Input SA25F010 Advanced Information www.DataSheet4U.com 6 SAIFUN ...

Page 7

... Ordering Information Figure 3. SA25F010 Ordering Information PP X Letter E F Blank X Blank F N Package M8 MLF Temp. Range Blank E Voltage Operating Range L Density 010 F Interface 25 SA SA25F010 Advanced Information www.DataSheet4U.com 7 SAIFUN Description Tube Tape and Reel Non-lead Free Lead Free 8-pin DIP ...

Page 8

... Latch Up Operating Conditions Operating Temperature: SA25F010 SA25F010E Positive Power Supply: SA25F010 - +150 C 4 -0.3 V +235 C 2000 V min. Minimum 4 KV Minimum 500 V Minimum 1 KV 100 mA on all pins +125 + + 3.6 V SA25F010 Advanced Information www.DataSheet4U.com 8 SAIFUN ...

Page 9

... CSb = V CC CSb = V CC CSb = 3 CSb = GND GND -0 1 SA25F010 Advanced Information www.DataSheet4U.com SAIFUN = 2.7-3 Limits Unit Typ* Max ...

Page 10

... Value guaranteed by characterization, not 100% tested in production Table 4. AC Test Conditions 25 MHz Min Typ D.C. 0.1 0 100 100 0.3 1 100K SA25F010 Advanced Information www.DataSheet4U.com 10 SAIFUN Unit Max 25 MHz V/ns V/ ...

Page 11

... CSS SCK t t SU:DAT HD:DAT SI MSB IN SO Figure 4. SPI Mode 0 (0,0) Input Timing CS SCK Figure 5. SPI Mode 0 (0,0) Output Timing t CSH t t CRT CFT LSB IN High Impedance t WH SA25F010 Advanced Information www.DataSheet4U.com 11 SAIFUN CSS DIS LSB OUT ...

Page 12

... Figure 6. AC Measurements I/O Waveform Table 5. AC Measurements Symbol Parameter C Load Capacitance L Input Rise and Fall Times Input Pulse Voltage Input and Output Timing Reference Voltages SA25F010 Advanced Information www.DataSheet4U.com Input and Output Timing Reference Levels 0.7Vcc 0.3Vcc Min Max Unit 30 pF ...

Page 13

... When this pin is held low, writes to the memory array and status register are disabled; when it is held high, they are enabled. Refer to Write Protect, page 16, for additional details. SA25F010 Advanced Information www.DataSheet4U.com SAIFUN eliminates the need the ...

Page 14

... Table 6, page 17). Invalid Opcode If an invalid opcode is received, no data is pins shifted into the SA25F010, and the serial output pin remains in a high impedance state until a CSb falling edge is detected again, which communication. ...

Page 15

... SI pin, and the SO pin remains in a high impedance state. Hold Condition The HOLDb pin is used in conjunction with the CSb pin to select the SA25F010. When the device is selected and a serial sequence is underway, HOLDb can be used to pause the serial communication with the master device without resetting the serial sequence ...

Page 16

... The WPb pin function is blocked when the WPBEN bit in the status register is 0, which enables the user to install the SA25F010 in a system with the WPb pin tied to ground but still able to write to the status register. All WPb pin functions are enabled when the WPBEN bit is set to 1. ...

Page 17

... DATA IN SERIAL CLOCK SSO SS1 SS2 SS3 Figure 9. SPI Serial Interface The SA25F010's SPI consists of an 8-bit instruction register that decodes a specific instruction to different instructions (called opcodes) are incorporated in the device for various operations. Table 6 lists the instruction set and the format for proper operation. All ...

Page 18

... The Bit 0 (/RDY) indicates the Busy/Ready status of the device. This bit is a read-only bit and is read by executing an RDSR instruction. If this bit is 1, the device is busy doing a Program or Erase cycle the device is ready. SA25F010 Advanced Information www.DataSheet4U.com 18 SAIFUN ...

Page 19

... SO pins, with the D7 bit first and the D0 bit last, as shown in Figure 10 Status Register Out MSB MSB SA25F010 Advanced Information www.DataSheet4U.com SAIFUN Status Register Out MSB 19 ...

Page 20

... WP pin's status. The WREN instruction should be executed after the WRDI instruction to re-enable all programming modes. The instruction sequence is shown in Figure 12, with SO in high impedance Instruction Instruction SA25F010 Advanced Information www.DataSheet4U.com 20 SAIFUN modes. The WRDI 7 7 ...

Page 21

... Write Status Register (WRSR) The WRSR instruction enables the user to select one of four levels of protection. The SA25F010 is divided into four array segments. The top quarter, top half or all of the memory segments can be protected (for more details, refer to Table 9). The data within a selected segment is therefore read-only ...

Page 22

... Figure 13. Write Status Register (WRSR) Instruction Sequence the 2. The WRSR transmitted on the SI pin, followed by the data to be programmed. The instruction sequence is shown in Figure 13 Instruction Status Register MSB SA25F010 Advanced Information www.DataSheet4U.com SAIFUN opcode is then ...

Page 23

... SCK progress 24-Bit Address MSB SA25F010 Advanced Information www.DataSheet4U.com SAIFUN READ sequence can be as the byte address is incremented and data DATA OUT 1 DATA OUT ...

Page 24

... Dummy Byte Address SA25F010 Advanced Information www.DataSheet4U.com SAIFUN . SCK READ sequence can as the byte address incremented and data CSb high terminates the DATA OUT 1 ...

Page 25

... If more than 256 bytes of data are transmitted, the address counter rolls over and the previously written data is overwritten. The SA25F010 is automatically returned to the write disable state at the completion of a Write cycle. NOTES the device is not write enabled, ...

Page 26

... MSB MSB Data Byte MSB MSB SA25F010 Advanced Information www.DataSheet4U.com SAIFUN Data Byte Data Byte 256 ...

Page 27

... The /RDY bit is 1 during the self-timed PE cycle, and 0 when it is completed. The WEN bit is reset at some unspecified time before the instruction sequence is shown in Figure 18. The SA25F010 is automatically returned to the Write Disable state at the completion cycle. NOTES the device is not write enabled, the ...

Page 28

... SE cycle, and 0 when it is completed. The WEN bit is reset at some unspecified time before the cycle is completed. The instruction sequence is shown in Figure 20. The SA25F010 is automatically returned to the write disable state at the completion cycle. NOTES the device is not write enabled, ...

Page 29

... The /RDY bit is 1 during the self-timed BE cycle, and 0 when it is completed. The WEN bit is reset at some unspecified time before the instruction sequence is shown in Figure 22. The SA25F010 is automatically returned to the Write Disable state at the completion cycle. NOTES the device is not write enabled, the ...

Page 30

... The DP instruction is included in the device in order to be compatible with other SPI Flash devices, and is identical to the SP instruction. The SA25F010's low standby current of 1 µA is the same in both DP and Standby modes recommended that the standard Standby mode be used for the lowest power current draw, as well as an extra SP mechanism while the device is not in active use ...

Page 31

... Table 4 on page 10. Once in Standby mode, the device waits to be selected, so that it can receive, decode and execute instructions Instruction Software Protect Mode SA25F010 Advanced Information www.DataSheet4U.com SAIFUN , and CSb must remain high RES (max), as specified in RES t RES Standby Mode 31 ...

Page 32

... Erase, Program or Write Status Register cycle is in progress is not decoded, and has no effect on the cycle in progress. This instruction serves a second purpose as well. The device features an 8-bit Electronic Signature, whose value for the SA25F010 is 10h. This can be read using the RES instruction ...

Page 33

... Write, Program or Erase cycle is in progress, data corruption can result.) is less CC ), all POR Symbol POR Threshold V POR reaches the . CC SA25F010 Advanced Information www.DataSheet4U.com SAIFUN rail decoupled by a suitable at powerdown from the POR Table 11. Powerup Parameter Min. Max . Unit 2.2 V 2.4 ...

Page 34

... Physical Dimensions All measurements are in inches (millimeters), unless otherwise specified. Figure 29. 8-pin SOIC Package SA25F010 Advanced Information www.DataSheet4U.com 34 SAIFUN ...

Page 35

... Figure 30. 8-pin MLF Leadless Package SA25F010 Advanced Information www.DataSheet4U.com 35 SAIFUN ...

Page 36

... Figure 31. Molded Dual-in-line Package (N) Package Number N08E SA25F010 Advanced Information www.DataSheet4U.com 36 SAIFUN ...

Page 37

... SA25F010 Advanced Information www.DataSheet4U.com United States Saifun Semiconductors Inc. 2350 Mission College Blvd. Suite 1070 Santa Clara, CA 95054 U ...

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