SA25F010 Saifun, SA25F010 Datasheet - Page 18

• Manufacturer Part Number: SA25F010
• Description: 1Mb Serial Flash
• Manufacturer: Saifun

WPBEN
In addition to the instruction register, the
device also contains an 8-bit status register
that can be accessed by RDSR and WRSR
instructions. The byte defines the Block
Write Protection (BP1 and BP0) levels,
Write Enable (WEN) status, Busy/Rdy
(/RDY) status and Hardware Write Protect
(WPBEN) status of the device. Table 7
illustrates the format of the status register.
Read Status Register (RDSR)
The
access
BUSY/RDY and WREN statuses of the
device can also be determined by this
instruction. In addition, the Block Write
Protection bits indicate the extent of
protection employed. In order to determine
the status of the device, the value of the
/RDY bit can be continuously polled before
sending any write instruction.
Bit 7
Bit 0 (/RDY)
Bit 1 (WEN)
Bit 2 (BP0)
Bit 3 (BP1)
(WPBEN)
Table 8. Read Status Register Definition
Bit 7
Bit
Table 7. Status Register Format
RDSR
Bit 6 Bit 5
X
to
X
Bit 0 = 0 (/RDY) indicates that the
device is READY.
Bit 0 = 1 indicates that a write
cycle is in progress.
Bit 1 = 0 indicates that the device
is not write enabled.
Bit 1 = 1 indicates that the device
is write enabled.
Write Protect Mode Enable Bit
Block Write Protect Bit 0
Block Write Protect Bit 1
the
instruction
Bit 4
X
status
Bit 3
BP1
Definition
provides
Bit 2
BP0 WEN /RDY
register.
Bit1
read
Bit 0
The
Bit 7 (WPBEN) is Hardware Write Protect
mode. If this bit is a 1, this mode is enabled
and the status register is write protected.
Bits 6 through 4 are always 0.
Bit 3 (BP1) and Bit 2 (BP0) together
indicate a Block Write Protection previously
sent to the device.
Bits 0 and 1 are 1 during an internal write
cycle.
Bit 1 (WEN) indicates the Write Enable
status of the device. This bit is read by
executing an RDSR instruction. If this bit is
1, the device is write enabled; if it is 0, it is
write disabled.
Bit 0 (/RDY) indicates the Busy/Ready
status of the device. This bit is a read-only
bit and is read by executing an RDSR
instruction. If this bit is 1, the device is busy
doing a Program or Erase cycle; if it is 0,
the device is ready.
SA25F010 Advanced Information
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