CY7C4245-15JXC Cypress Semiconductor Corp, CY7C4245-15JXC Datasheet - Page 10

IC SYNC FIFO MEM 4KX18 68-PLCC

CY7C4245-15JXC

Manufacturer Part Number
CY7C4245-15JXC
Description
IC SYNC FIFO MEM 4KX18 68-PLCC
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet

Specifications of CY7C4245-15JXC

Access Time
10ns
Memory Size
72K (4K x 18)
Package / Case
68-PLCC
Function
Synchronous
Data Rate
100MHz
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
2
Data Bus Width
18 bit
Bus Direction
Unidirectional
Timing Type
Synchronous
Organization
4 K x 18
Maximum Clock Frequency
66.7 MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
45 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C4245-15JXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C4245-15JXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Characteristics
Switching Waveforms
Note
Document Number: 001-45652 Rev. **
t
t
t
t
t
t
t
18. t
HF
XO
XI
XIS
SKEW1
SKEW2
SKEW3
Parameter
the rising edge of RCLK and the rising edge of WCLK is less than t
SKEW1
WCLK
RCLK
–D
WEN
REN
FF
17
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF will go HIGH during the current clock cycle. If the time between
Clock to Half-Full Flag
Clock to Expansion Out
Expansion in Pulse Width
Expansion in Set-up Time
Skew Time between Read Clock and Write Clock
for Full Flag
Skew Time between Read Clock and Write Clock
for Empty Flag
Skew Time between Read Clock and Write Clock
for Programmable Almost Empty and Program-
mable Almost Full Flags.
t
SKEW1
Description
Over the Operating Range (continued)
t
[18]
CLKH
t
WFF
t
CLK
Figure 6. Write Cycle Timing
t
DS
SKEW1
t
CLKL
t
ENS
, then FF may not change state until the next WCLK edge.
Min.
4.5
10
3
5
5
-10
Max.
t
DH
12
t
ENH
7
t
WFF
Min.
6.5
15
5
6
6
-15
Max.
16
10
NO OPERATION
CY7C4425/4205/4215
CY7C4225/4235/4245
Min.
10
10
10
10
18
-25
Max.
20
15
Min.
14
15
12
12
20
-35
Page 10 of 22
Max.
25
20
Unit
ns
ns
ns
ns
ns
ns
ns
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