LMX2433TM National Semiconductor, LMX2433TM Datasheet - Page 46

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LMX2433TM

Manufacturer Part Number
LMX2433TM
Description
PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
Manufacturer
National Semiconductor
Datasheets

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Reg
R5
2.0 Programming Description
2.9 R5 REGISTER
The R5 Register contains the IF_TOC control word. The IF_TOC is used to setup the IF syhnthesizer’s Fastlock circuitry. The
IF_TOC is a 12-bit binary counter programmable from 0 to 4095.
2.9.1 IF_TOC[0:11] - IF Synthesizer Timeout Counter (R5[14:3])
The OSCout/ FLoutIF pin can be configured as a general purpose CMOS TRI-STATE output or as a Fastlock output by
programming the IF_TOC appropriately. When the IF_TOC is programmed from 0 to 3, Automatic Fastlock is disabled, and the
OSCout/ FLoutIF pin is configured as a general purpose CMOS TRI-STATE output or Manual Fastlock is enabled. When the
IF_TOC is programmed to 0, the OSCout/ FLoutIF pin will be in TRI-STATE (high impedance) mode. The charge pump current
is then the value specified by IF_CPG (R3[19]). When the IF_TOC is programmed to 1, the OSCout/ FLoutIF pin is pulled to a
LOW state. The charge pump current is then set to a HIGH gain state (IF_CPG bit = 1). This condition is known as the Manual
Fastlock. When the IF_TOC is programmed to 2, the OSCout/ FLout_IF pin will again be pulled to a LOW state, but this time the
charge pump current is the value specified by IF_CPG (R3[19]). When the IF_TOC is programmed to 3, the OSCout/ FLoutIF pin
is pulled to a HIGH state. Again, the charge pump current is the value specified by IF_CPG (R3[19]). When the IF_TOC is
programmed from 4 to 4095, Fastlock is enabled and the OSCout/ FLoutIF pin is pulled to a LOW state. Fastlock will time-out after
the specified number of PFD events. At this time, the OSCout/ FLoutIF pin will switch to TRI-STATE (high impedance) mode. The
value programmed into IF_TOC represents the number of PFD events that the IF synthesizer will spend in the Fastlock state.
Note that any write to the IF_TOC requires a PFD event on the IF synthesizer to latch the contents. This means that writes to the
IF_TOC take effect synchronously with the next PFD event.
23
IF_TOC[11:0]
0
4095
22
0
0
1
2
3
4
21
0
20
0
19
0
Automatic Fastlock
Automatic Fastlock
FastLock Mode
Manual Fastlock
18
Disabled
Disabled
Disabled
0
Enabled
Enabled
Enabled
17
0
16
0
15
0
DATA[20:0] FIELD
14
(Continued)
Fastlock Period
[PFD Events]
13
4095
N/A
N/A
N/A
N/A
4
12
46
11
10
General Purpose.
High Impedance State
General Purpose.
Logic LOW State
General Purpose.
Logic LOW State
General Purpose.
Logic HIGH State
FastLock.
Logic LOW State.
Switches to High
Impedance after 4 PFD
events
FastLock.
Logic LOW State.
Switches to High
Impedance after 4095
PFD events
IF_TOC[11:0]
OSCout/ FLoutIF Pin
Functionality/ State
9
8
7
6
5
I
controlled by R3[19]
I
I
controlled by R3[19]
I
controlled by R3[19]
I
Switches to 1 mA after
4 PFD events
I
Switches to 1 mA after
4095 PFD events
CPoutIF
CPoutIF
CPoutIF
CPoutIF
CPoutIF
CPoutIF
I
CPoutIF
4
magnitude
= 4 mA
magnitude
magnitude
= 4 mA
= 4 mA
3
Magnitude
2
1
ADDRESS
FIELD
[2:0]
1
0
0
1

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