MRF1518T1 Motorola, MRF1518T1 Datasheet - Page 11

• Manufacturer Part Number: MRF1518T1
• Description: The RF MOSFET Line RF POWER FIELD EFFECT TRANSISTOR
• Manufacturer: Motorola

DESIGN CONSIDERATIONS
enhancement mode, Lateral Metal–Oxide Semiconductor
Field–Effect Transistor (MOSFET). Motorola Application Note
AN211A, “FETs in Theory and Practice”, is suggested reading
for those not familiar with the construction and characteristics
of FETs.
ly for VHF and UHF portable power amplifier applications.
Manufacturability is improved by utilizing the tape and reel
capability for fully automated pick and placement of parts.
However, care should be taken in the design process to insure
proper heat sinking of the device.
include high gain, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely
mismatched loads without suffering damage.
MOSFET CAPACITANCES
between all three terminals. The metal oxide gate structure
determines the capacitors from gate–to–drain (C
gate–to–source (C
tion of the RF MOSFET results in a junction capacitance from
drain–to–source (C
as input (C
capacitances on data sheets. The relationships between the
inter–terminal capacitances and those given on data sheets
are shown below. The C iss can be specified in two ways:
method represents the actual operating conditions in RF
applications.
DRAIN CHARACTERISTICS
in the full–on condition. This on–resistance, R DS(on) , occurs in
the linear region of the output characteristic and is specified
at a specific gate–source voltage and drain current. The
drain–source voltage under these conditions is termed
V DS(on) . For MOSFETs, V DS(on) has a positive temperature
MOTOROLA RF DEVICE DATA
This device is a common–source, RF power, N–Channel
This surface mount packaged device was designed primari-
The major advantages of Lateral RF power MOSFETs
The physical structure of a MOSFET results in capacitors
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and
In the latter case, the numbers are lower. However, neither
One critical figure of merit for a FET is its static resistance
Gate
zero volts at the gate.
iss
), output (C
C gd
C gs
gs
ds
). The PN junction formed during fabrica-
). These capacitances are characterized
oss
) and reverse transfer (C
Drain
Source
C ds
C iss = C gd + C gs
C oss = C gd + C ds
C rss = C gd
APPLICATIONS INFORMATION
gd
), and
rss )
coefficient at high temperatures because it contributes to the
power dissipation within the device.
required for typical applications. Measurement of BV DSS is not
recommended and may result in possible damage to the
device.
GATE CHARACTERISTICS
is electrically isolated from the source by a layer of oxide. The
DC input resistance is very high – on the order of 10
resulting in a leakage current of a few nanoamperes.
the gate greater than the gate–to–source threshold voltage,
V
rating. Exceeding the rated V
damage to the oxide layer in the gate region.
essentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on the
input capacitor due to leakage currents or pickup.
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended.
Using a resistor to keep the gate–to–source impedance low
also helps dampen transients and serves another important
function. Voltage transients on the drain can be coupled to the
gate through the parasitic gate–drain capacitance. If the
gate–to–source impedance and the rate of voltage change on
the drain are both high, then the signal coupled to the gate may
be large enough to exceed the gate–threshold voltage and
turn the device on.
DC BIAS
current flows only when the gate is at a higher potential than
the source. RF power FETs operate optimally with a quiescent
drain current (I
This device was characterized at I
suggested value of bias current for typical applications. For
special applications such as linear amplification, I
to be selected to optimize the critical parameters.
Therefore, the gate bias circuit may generally be just a simple
resistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
degree with a low power dc control signal applied to the gate,
thus facilitating applications such as manual gain control,
ALC/AGC and modulation systems. This characteristic is very
dependent on frequency and load line.
GS(th)
BV DSS values for this device are higher than normally
The gate of the RF MOSFET is a polysilicon material, and
Gate control is achieved by applying a positive voltage to
Gate Voltage Rating — Never exceed the gate voltage
Gate Termination — The gates of these devices are
Gate Protection — These devices do not have an internal
Since this device is an enhancement mode FET, drain
The gate is a dc open circuit and draws no current.
Power output of this device may be controlled to some
.
DQ
), whose value is application dependent.
GS
DQ
can result in permanent
= 150 mA, which is the
MRF1518T1
DQ
may have
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