HT68F04 Holtek Semiconductor, HT68F04 Datasheet - Page 91

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HT68F04

Manufacturer Part Number
HT68F04
Description
Small Package Enhanced Flash Type 8-Bit MCU
Manufacturer
Holtek Semiconductor
Datasheet

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Single Pulse Output Mode
To select this mode, the required bit pairs, TnAM1,
TnAM0 and TnBM1, TnBM0 should be set to 10 respec-
tively and also the corresponding TnAIO1, TnAIO0 and
TnBIO1, TnBIO0 bits should be set to 11 respectively.
The Single Pulse Output Mode, as the name suggests,
will generate a single shot pulse on the TM output pin.
The trigger for the pulse TPnA output leading edge is a
low to high transition of the TnON bit, which can be im-
plemented using the application program. The trigger
for the pulse TPnB output leading edge is a compare
match from Comparator B, which can be implemented
using the application program. However in the Single
Pulse Mode, the TnON bit can also be made to automat-
ically change from low to high using the external TCKn
pin, which will in turn initiate the Single Pulse output of
TPnA. When the TnON bit transitions to a high level, the
counter will start running and the pulse leading edge of
Rev. 1.00
®
Single Pulse Generation
HT66F03/HT66F04/HT68F03/HT68F04
91
TPnA will be generated. The TnON bit should remain
high when the pulse is in its active state. The generated
pulse trailing edge of TPnA and TPnB will be generated
when the TnON bit is cleared to zero, which can be im-
plemented using the application program or when a
compare match occurs from Comparator A.
However a compare match from Comparator A will also
automatically clear the TnON bit and thus generate the
Single Pulse output trailing edge of TPnA and TPnB. In
this way the CCRA value can be used to control the
pulse width of TPnA. The CCRA-CCRB value can be
used to control the pulse width of TPnB. A compare
match from Comparator A and Comparator B will also
generate TM interrupts. The counter can only be reset
back to zero when the TnON bit changes from low to
high when the counter restarts. In the Single Pulse
Mode CCRP is not used. The TnCCLR bit is also not
used.
®
April 16, 2010
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