UPSD3234AV-24U1T STMicroelectronics, UPSD3234AV-24U1T Datasheet - Page 124

no-image

UPSD3234AV-24U1T

Manufacturer Part Number
UPSD3234AV-24U1T
Description
Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
Manufacturer
STMicroelectronics
Datasheet
www.DataSheet4U.com
uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Ports A and B – Functionality and Structure
Ports A and B have similar functionality and struc-
ture, as shown in Figure 65. The two ports can be
configured to perform one or more of the following
functions:
Figure 65. Port A and Port B Structure
124/170
MCU I/O Mode
CPLD Output – Macrocells McellAB7-
McellAB0 can be connected to Port A or Port
B. McellBC7-McellBC0 can be connected to
Port B or Port C.
ALE
ADDRESS
MACROCELL OUTPUTS
WR
WR
WR
ENABLE PRODUCT TERM ( .OE )
CONTROL REG.
CPLD-INPUT
DATA OUT
READ MUX
DIR REG.
D
D
G
D
D
REG.
D
B
P
Q
Q
Q
Q
ADDRESS
A [ 7:0 ]
DATA OUT
DATA IN
CPLD Input – Via the Input Macrocells (IMC).
Latched Address output – Provide latched
address output as per
Open Drain/Slew Rate – pins PA3-PA0 and
PB3-PB0 can be configured to fast slew rate,
pins PA7-PA4 and PB7-PB4 can be
configured to Open Drain Mode.
Peripheral Mode – Port A only (80-pin
package)
OUTPUT
SELECT
OUTPUT
MUX
ENABLE OUT
MACROCELL
INPUT
Table 94., page
A OR B PIN
PORT
AI06605
121.

Related parts for UPSD3234AV-24U1T