AN1178 STMicroelectronics, AN1178 Datasheet
AN1178
Related parts for AN1178
AN1178 Summary of contents
Page 1
... For IAP, the MCU partici- pates in programming the memory, which is important for sys- tems that must be online while updating firmware. Often, ISP is well suited for manufacturing, while IAP is appropriate for field updates. PSD8XX devices are capable of both ISP and IAP. AN1178 1/25 ...
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... AN1178 - APPLICATION NOTE Keep in mind that IAP can only program the memory sections of the PSD and not the configuration and programmable logic portions. With ISP, the entire PSD can be erased or programmed. The IAP Problem Typically, a host computer downloads firmware into an embedded Flash memory system through a com- munication channel that is controlled by the MCU ...
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... The FlashLINK™ cable and PSDsoft Express software are available in a kit from the website www.st.com/ psd . 128 KByte Flash Optional 32 KByte 80C32 Optional 2KByte SRAM Programmable Logic I/O Channel Embedded System AN1178 - APPLICATION NOTE PSD813F JTAG EEPROM/Flash System I/O AI03340B 3/25 ...
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... AN1178 - APPLICATION NOTE Figure 3. Top Level Block Diagram of PSD813F PSD813F PHYSICAL CONNECTIONS Connect your 80C32 to the PSD8XX as shown in Figure 4 (next page). The same connections can be used for all of the members of the PSD8XX family except the PSD835G2, which has more I/O. The JTAG programming channel, SRAM with battery backup, LCD module, and MCU I/O connections are all option- al ...
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... RD CNTL1 PC1 PSEN\ 49 PSEN CNTL2 PC2 PC3 PC4 AS 10 ALE PD0 PC5 PC6 PC7 PD1 RESET RESET\ 48 RST RESET PD2 AN1178 - APPLICATION NOTE AD7-AD0 DATA BUS LCD MODULE 29 RWLCD R/W 28 RSLCD CSLCD MCUIO0 6 MCUIO1 MCU I/O 5 MCUIO2 ...
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... AN1178 - APPLICATION NOTE Figure 5. Memory Map, Simple 80C32/PSD813F design FFFF 8000 Optional Boot Flash/EEPROM 6000 Optional Boot Flash/EEPROM 4000 Boot from Optional Boot Flash/EEPROM Here 2000 Optional Boot Flash/EEPROM 0000 Keep the following in mind about the sample memory map shown in Figure 5: Yellow (shaded) indicates memory that is common to all pages ...
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... Based on the above selections, the “Bus Width”, “Bus Mode”, and “ALE/AS Active Level” will be set auto- matically. Set the main Flash memory to “Data Space Only” and the secondary Flash memory to “Program Space Only”. This is what the screen should look like after you’ve made the selections: AN1178 - APPLICATION NOTE 7/25 ...
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... AN1178 - APPLICATION NOTE Now you have your project established based on a PSD813F2 and an 80C32. However, there are many other MCU/MPUs you could have chosen in place of the 80C32 and still have use of this document. Note that this template will work in our DK900 development kit. Click OK and the “Design Parameters” window will appear. Design Parameters . Choose “ ...
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... Connections shown in Section 2. On this screen, you can add or update pin functionality as desired. Click Next >> taken to the “Design Assistant” screen. Note: there are detailed instructions on how to use this screen and other “Design Assistant” screens in the PSDsoft Express User Manual . AN1178 - APPLICATION NOTE 9/25 ...
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... AN1178 - APPLICATION NOTE Page Register Definition. Looking at the memory map in Figure 5, we see that wee will need four mem- ory pages need to define two Page Register bits (2 ously, the “Page Register Definition” should match the one shown below. Later, you will see how the Page Register can be used for general logic inputs to the PLD. Click Next > ...
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... Chip Select Equations. Use this screen to enter chip-select equations to match your memory map. The chip select equations shown should match the memory map of Figure 5. Note the page number associa- tion for the fs0-7 segment selects. Click Next >> when finished. AN1178 - APPLICATION NOTE 11/25 ...
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... AN1178 - APPLICATION NOTE I/O Logic and User Defined Node Equations. The “I/O Logic Equations” and “User Defined Node Equations” screens are used to enter equations for the registered logic within the PSD. Since this docu- ment focuses on issues related to ISP and IAP, registered logic equations are not covered. However, for more information on entering registered logic equations, refer to the PSDsoft Express User Manual . Also, see Application Note AN1356 — ...
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... These are the absolute address ranges that PSDsoft Express will expect to see inside the file(s) generated by your 80C32 linker. However, if PSDsoft Express sees that paging information is used in your PSD memory segment equations, PSDsoft Express warns you it has filled in address ranges that AN1178 - APPLICATION NOTE 13/25 ...
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... AN1178 - APPLICATION NOTE may be ambiguous (overlapping or dependent on non-address signals, like page register bits) and you to resolve them. How you resolve them is purely a function of your 80C32 compiler/linker and how it handles paging. For example, some MCU linkers will generate a different file for each memory page of firmware, and each of these files will contain MCU addresses that do not exceed 16 bits ...
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... Third-party programmers, such as Stag and Needhams. See the website at www.st.com/psd for a list of compatible third-party programmers. First we’ll show you how to use the FlashLINK Programming with FlashLINK ™ JTAG cable to program the PSD. ™ ™ . Connect the FlashLINK AN1178 - APPLICATION NOTE cable to your PC’s parallel port. Click the 15/25 ...
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... AN1178 - APPLICATION NOTE ST JTAG/ISP box in the Design Flow window. You will be prompted for the number of devices in the JTAG chain on your circuit board. Make the appropriate selection and click OK. This document assumes only one device is in the JTAG chain. If you have more than one device, refer to the PSDsoft Express User Manual ...
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... The “swap” bit is one of the eight internal PSD page register bits, whose value is zero by default. The “swap” bit is an example of how the page register bits can be imple- mented for uses other than memory paging. The VM Register controls which space (Program or Data) the AN1178 - APPLICATION NOTE 17/25 ...
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... AN1178 - APPLICATION NOTE PSD memories appear in and can be set prior to runtime using PSDsoft Express Configuration. The VM register resides in the PSD and can be accessed at any time by the 80C32. (See the PSD8XX data sheets.) Here’s what the 80C32 does upon power-up or reset: ...
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... Unmapped 16 KBytes CSBOOT1/EES1 Optional Boot Flash/EEPROM 8 KBytes Not to Scale CSBOOT0/EES0 Optional Boot Flash/EEPROM 8 KBytes swap = 0 unlock = 0 VM Register = 06h AN1178 - APPLICATION NOTE Data Space FFFF Unmapped 54 KBytes 2800 Optional SRAM (RS0) 2 KBytes 2000 Unmapped 0400 LCD Chip Select (CSLCD) 256 Bytes ...
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... AN1178 - APPLICATION NOTE Figure 8. Memory Map After Setting the “swap” bit FFFF Boot Memory temporarily overlaps E000 Flash segments FS3, FS5 and FS7 C000 Boot Memory temporarily overlaps A000 Flash segments FS2, FS4 and FS6 8000 Execute 4000 from Here 0000 Memory Map Configuration After Moving the Boot Flash Memory to Data Space ...
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... FS0 0400 Not to 16 KBytes Scale 0300 (Flash Sector 0) 0200 0000 swap = 1 unlock = Register = 0Ch AN1178 - APPLICATION NOTE Data Space CSBOOT3/EES3 Optional Boot Flash/EEPROM 8 KBytes CSBOOT2/EES2 Optional Boot Flash/EEPROM 8 KBytes CSBOOT1/EES1 Optional Boot Flash/EEPROM 8 KBytes CSBOOT0/EES0 Optional Boot Flash/EEPROM ...
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... AN1178 - APPLICATION NOTE these two bits are defined as logic inputs to the PLD instead of paging bits. The chip selects will now match the situational memory maps outlined in Figure 6 to Figure 9. That is, the memory map that is presented to the MCU varies dynamically based on the settings of the VM Register and Page Register bits “ ...
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... KBytes (Flash Sector 1) 4000 2900 FS0 2800 Not to 16 KBytes Scale 2000 (Flash Sector 0) 0400 0000 AN1178 - APPLICATION NOTE Data Space Unmapped 48 KBytes Unmapped 5.75 KBytes PSD Control Register (CSIOP) 256 Bytes Optional SRAM (RS0) 2 KBytes Unmapped 8xC51 RAM KByte AI03350B ...
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... AN1178 - APPLICATION NOTE Table 1. Document Revision History Date Rev. Aug-2000 2.0 Document written in the WSI format 26-Oct-2001 3.0 Document converted to the ST format 24/25 Description of Revision ...
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... Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. www.st.com/psd apps.psd@st.com (for application support) (for general enquiries) The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners. 2001 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES www.st.com AN1178 - APPLICATION NOTE 25/25 ...