MTD9N10E Motorola, MTD9N10E Datasheet

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MTD9N10E

Manufacturer Part Number
MTD9N10E
Description
TMOS POWER FET
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Designer's
TMOS E-FET
Power Field Effect Transistor
DPAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
MAXIMUM RATINGS
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1995
Drain–Source Voltage
Drain–Gate Voltage (R GS = 1.0 M )
Gate–Source Voltage — Continuous
Gate–Source Voltage
Drain Current — Continuous
Drain Current
Drain Current
Total Power Dissipation
Total Power Dissipation @ T A = 25 C, when mounted to minimum recommended pad size
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting T J = 25 C
Thermal Resistance — Junction to Case
Thermal Resistance
Thermal Resistance
Maximum Temperature for Soldering Purposes, 1/8 from case for 10 seconds
This advanced TMOS E–FET is designed to withstand high
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
I DSS and V DS(on) Specified at Elevated Temperature
Surface Mount Package Available in 16 mm, 13–inch/2500
Unit Tape & Reel, Add T4 Suffix to Part Number
Replaces MTD6N10
Derate above 25 C
(V DD = 25 Vdc, V GS = 10 Vdc, I L = 9.0 Apk, L = 1.0 mH, R G = 25 )
— Continuous @ 100 C
— Single Pulse (t p
— Junction to Ambient
— Junction to Ambient, when mounted to minimum recommended pad size
— Non–Repetitive (t p
(T C = 25 C unless otherwise noted)
Data Sheet
.
10 s)
Rating
10 ms)
G
D
S
Symbol
T J , T stg
V GSM
V DGR
V DSS
R JC
R JA
R JA
V GS
E AS
I DM
P D
T L
I D
I D
MTD9N10E
R DS(on) = 0.25 OHM
CASE 369A–13, Style 2
TMOS POWER FET
Motorola Preferred Device
– 55 to 150
9.0 AMPERES
100 VOLTS
Value
0.32
1.75
3.13
71.4
100
100
100
260
9.0
5.0
Order this document
27
40
40
20
30
DPAK
by MTD9N10E/D
Watts
Watts
W/ C
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
C/W
mJ
C
C
1

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MTD9N10E Summary of contents

Page 1

... Preferred devices are Motorola recommended choices for future use and best overall value. REV 2 Motorola TMOS Power MOSFET Transistor Device Data Motorola, Inc. 1995 G Rating 10 ms Order this document by MTD9N10E/D MTD9N10E Motorola Preferred Device TMOS POWER FET 9.0 AMPERES 100 VOLTS R DS(on) = 0.25 OHM D CASE 369A–13, Style 2 ...

Page 2

... MTD9N10E www.DataSheet4U.com ELECTRICAL CHARACTERISTICS Characteristic OFF CHARACTERISTICS Drain–Source Breakdown Voltage ( Vdc 250 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current ( 100 Vdc Vdc 100 Vdc Vdc 125 C) Gate–Body Leakage Current ( ...

Page 3

... C 0.17 – 0. 100 10 1.0 0 100 125 150 30 MTD9N10E – 100 C 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7 GATE–TO–SOURCE VOLTAGE (VOLTS) Figure 2. Transfer Characteristics DRAIN CURRENT (AMPS) Figure 4. On–Resistance versus Drain Current ...

Page 4

... MTD9N10E www.DataSheet4U.com Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge controlled. The lengths of various switching intervals ( t) are deter- mined by how fast the FET input capacitance can be charged by current from the generator. The published capacitance data is difficult to use for calcu- lating rise and fall because drain– ...

Page 5

... accordance with industry custom. The energy rat- ing must be derated for temperature as shown in the accompanying graph (Figure 12). Maximum energy at cur- rents below rated continuous I D can safely be assumed to equal the values indicated. MTD9N10E ...

Page 6

... MTD9N10E www.DataSheet4U.com 100 SINGLE PULSE 100 s 1.0 0.1 R DS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.01 0.1 1 DRAIN–TO–SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area 1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 1.0E–05 1.0E–04 6 SAFE OPERATING AREA ...

Page 7

... Figure 15. Thermal Resistance versus Drain Pad Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad . Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. MTD9N10E 0.063 1.6 0.243 6.172 inches mm Board Material = 0 ...

Page 8

... MTD9N10E www.DataSheet4U.com Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. Solder stencils are used to screen the optimum amount. These stencils are typically 0.008 inches thick and may be made of brass or stainless steel. For packages such as the SC–59, SC– ...

Page 9

... DESIRED CURVE FOR HIGH 160 C MASS ASSEMBLIES 150 C 100 C 140 C DESIRED CURVE FOR LOW MASS ASSEMBLIES TIME ( MINUTES TOTAL) Figure 17. Typical Solder Heating Profile MTD9N10E STEP 5 STEP 6 STEP 7 HEATING VENT COOLING ZONES 4 & 7 “SPIKE” 205 TO 219 C PEAK AT ...

Page 10

... D 0.027 0.035 0.69 0.88 E 0.033 0.040 0.84 1.01 F 0.037 0.047 0.94 1.19 G 0.180 BSC 4.58 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.102 0.114 2.60 2.89 L 0.090 BSC 2.29 BSC R 0.175 0.215 4.45 5.46 S 0.020 0.050 0.51 1.27 U 0.020 ––– 0.51 ––– V 0.030 0.050 0.77 1.27 Z 0.138 ––– 3.51 ––– MTD9N10E/D *MTD9N10E/D* ...

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