SN74LS259D Motorola, SN74LS259D Datasheet - Page 4

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SN74LS259D

Manufacturer Part Number
SN74LS259D
Description
8-BIT ADDRESSABLE LATCH
Manufacturer
Motorola
Datasheet
A 1
A 1
Q 1
NOTES:
1. The Address to Enable Setup Time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is
2. The shaded areas indicate when the inputs are permitted to change for predictable output performance.
D
E
Q
Figure 1. Turn-on and Turn-off Delays, Enable To
addressed and the other latches are not affected.
C
Q
OTHER CONDITIONS: E = H
OTHER CONDITIONS: E = L, C = L, D = H
OTHER CONDITIONS: C = H, A = STABLE
Figure 3. Turn-on and Turn-off Delays,
Figure 5. Turn-on Delay, Clear to Output
Output and Enable Pulse Width
t PHL
t w
1.3 V
1.3 V
Address to Output
1.3 V
t PHL
1.3 V
t PLH
1.3 V
t w
t PHL
1.3 V
1.3 V
1.3 V
1.3 V
FAST AND LS TTL DATA
SN54/74LS259
1.3 V
AC WAVEFORMS
t PLH
5-436
A
E
Q
D
E
D
Q
OTHER CONDITIONS: C = H
Figure 4. Setup and Hold Time, Data to Enable
Figure 6. Setup Time, Address to Enable
OTHER CONDITIONS: C = H, A = STABLE
OTHER CONDITIONS: E = L, C = H, A = STABLE
Figure 2. Turn-on and Turn-off Delays,
Q=D
t s (H)
(See Notes 1 and 2)
1.3 V
Data to Output
t s
1.3 V
t PHL
t h (H)
STABLE ADDRESS
t s (L)
Q=D
1.3 V
1.3 V
1.3 V
t PLH
t h (L)

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