LM3S1512 Luminary Micro, Inc, LM3S1512 Datasheet - Page 268

• Manufacturer Part Number: LM3S1512
• Description: Lm3s1512 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Analog-to-Digital Converter (ADC)
12.2.3
12.2.4
12.2.5
268
but all devices share the "Controller" and "Always" triggers. Software can initiate sampling by setting
the CH bits in the ADC Processor Sample Sequence Initiate (ADCPSSI) register.
When using the "Always" trigger, care must be taken. If a sequence's priority is too high, it is possible
to starve other lower priority sequences.
Hardware Sample Averaging Circuit
Higher precision results can be generated using the hardware averaging circuit, however, the
improved results are at the cost of throughput. Up to 64 samples can be accumulated and averaged
to form a single data entry in the sequencer FIFO. Throughput is decreased proportionally to the
number of samples in the averaging calculation. For example, if the averaging circuit is configured
to average 16 samples, the throughput is decreased by a factor of 16.
By default the averaging circuit is off and all data from the converter passes through to the sequencer
FIFO. The averaging hardware is controlled by the ADC Sample Averaging Control (ADCSAC)
register (see page 284). There is a single averaging circuit and all input channels receive the same
amount of averaging whether they are single-ended or differential.
Analog-to-Digital Converter
The converter itself generates a 10-bit output value for selected analog input. Special analog pads
are used to minimize the distortion on the input. An internal 3 V reference is used by the converter
resulting in sample values ranging from 0x000 at 0 V input to 0x3FF at 3 V input when in single-ended
input mode.
Differential Sampling
In addition to traditional single-ended sampling, the ADC module supports differential sampling of
two analog input channels. To enable differential sampling, software must set the D bit (in the
ADCSSCTL0 register) in a step's configuration nibble.
When a sequence step is configured for differential sampling, its corresponding value in the
ADCSSMUX register must be set to one of the four differential pairs, numbered 0-3. Differential pair
0 samples analog inputs 0 and 1; differential pair 1 samples analog inputs 2 and 3; and so on (see
Table 12-2 on page 268). The ADC does not support other differential pairings such as analog input
0 with analog input 3. The number of differential pairs supported is dependent on the number of
analog inputs (see Table 12-2 on page 268).
Table 12-2. Differential Sampling Pairs
The voltage sampled in differential mode is the difference between the odd and even channels:
∆V (differential voltage) = V
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■
■
The differential pairs assign polarities to the analog inputs: the even-numbered input is always
positive, and the odd-numbered input is always negative. In order for a valid conversion result to
appear, the negative input must be in the range of ± 1.5 V of the positive input. If an analog input
Differential Pair
0
If ∆V = 0, then the conversion result = 0x1FF
If ∆V > 0, then the conversion result > 0x1FF (range is 0x1FF–0x3FF)
If ∆V < 0, then the conversion result < 0x1FF (range is 0–0x1FF)
Analog Inputs
0 and 1
IN_EVEN
(even channels) – V
Preliminary
IN_ODD
(odd channels), therefore:
July 25, 2008