LM3S1918 Luminary Micro, Inc, LM3S1918 Datasheet - Page 9

• Manufacturer Part Number: LM3S1918
• Description: Lm3s1918 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Figure 15-3.
Figure 15-4.
Figure 15-5.
Figure 15-6.
Figure 15-7.
Figure 15-8.
Figure 15-9.
Figure 15-10. Master Burst RECEIVE .................................................................................................. 384
Figure 15-11. Master Burst RECEIVE after Burst SEND ........................................................................ 385
Figure 15-12. Master Burst SEND after Burst RECEIVE ........................................................................ 386
Figure 15-13. Slave Command Sequence ............................................................................................ 387
Figure 16-1.
Figure 16-2.
Figure 16-3.
Figure 17-1.
Figure 17-2.
Figure 20-1.
Figure 20-2.
Figure 20-3.
Figure 20-4.
Figure 20-5.
Figure 20-6.
Figure 20-7.
Figure 20-8.
Figure 20-9.
Figure 20-10. External Reset Timing (RST) .......................................................................................... 462
Figure 20-11. Power-On Reset Timing ................................................................................................. 463
Figure 20-12. Brown-Out Reset Timing ................................................................................................ 463
Figure 20-13. Software Reset Timing ................................................................................................... 463
Figure 20-14. Watchdog Reset Timing ................................................................................................. 463
Figure 21-1.
Figure 21-2.
July 26, 2008
START and STOP Conditions ......................................................................................... 377
Complete Data Transfer with a 7-Bit Address ................................................................... 378
R/S Bit in First Byte ........................................................................................................ 378
Data Validity During Bit Transfer on the I
Master Single SEND ...................................................................................................... 381
Master Single RECEIVE ................................................................................................. 382
Master Burst SEND ....................................................................................................... 383
Analog Comparator Module Block Diagram ..................................................................... 411
Structure of Comparator Unit .......................................................................................... 412
Comparator Internal Reference Structure ........................................................................ 413
100-Pin LQFP Package Pin Diagram .............................................................................. 423
108-Ball BGA Package Pin Diagram (Top View) ............................................................... 424
Load Conditions ............................................................................................................ 455
I
Hibernation Module Timing ............................................................................................. 458
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 459
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 459
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 460
JTAG Test Clock Input Timing ......................................................................................... 461
JTAG Test Access Port (TAP) Timing .............................................................................. 461
JTAG TRST Timing ........................................................................................................ 461
100-Pin LQFP Package .................................................................................................. 464
108-Ball BGA Package .................................................................................................. 466
2
C Timing ..................................................................................................................... 458
Preliminary
2
C Bus ............................................................... 378
LM3S1918 Microcontroller
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