LM3S2608 Luminary Micro, Inc, LM3S2608 Datasheet - Page 294

• Manufacturer Part Number: LM3S2608
• Description: Lm3s2608 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
Analog-to-Digital Converter (ADC)
ADC Sample Sequence Control 1 (ADCSSCTL1)
Base 0x4003.8000
Offset 0x064
Type R/W, reset 0x0000.0000
294
Bit/Field
31:16
15
14
13
12
11
10
TS3
R/W
9
8
RO
31
15
0
0
R/W
Register 23: ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064
Register 24: ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084
These registers contain the configuration information for each sample for a sequence executed with
Sample Sequencer 1 or 2. When configuring a sample sequence, the END bit must be set at some
point, whether it be after the first sample, last sample, or any sample in between. This register is
16-bits wide and contains information for four possible samples. See the ADCSSCTL0 register on
page 288 for detailed bit descriptions.
RO
IE3
30
14
0
0
END3
R/W
reserved
RO
29
13
0
0
Name
END3
END2
TS3
TS2
IE3
IE2
D3
D2
R/W
RO
28
12
D3
0
0
TS2
R/W
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
RO
IE2
26
10
0
0
Reset
END2
0x00
R/W
RO
25
0
9
0
0
0
0
0
0
0
0
0
Preliminary
R/W
RO
D2
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
4th Sample Temp Sensor Select
Same definition as TS7 but used during the fourth sample.
4th Sample Interrupt Enable
Same definition as IE7 but used during the fourth sample.
4th Sample is End of Sequence
Same definition as END7 but used during the fourth sample.
4th Sample Diff Input Select
Same definition as D7 but used during the fourth sample.
3rd Sample Temp Sensor Select
Same definition as TS7 but used during the third sample.
3rd Sample Interrupt Enable
Same definition as IE7 but used during the third sample.
3rd Sample is End of Sequence
Same definition as END7 but used during the third sample.
3rd Sample Diff Input Select
Same definition as D7 but used during the third sample.
reserved
R/W
TS1
RO
23
0
7
0
R/W
RO
IE1
22
0
6
0
END1
R/W
RO
21
0
5
0
R/W
RO
D1
20
0
4
0
R/W
TS0
RO
19
0
3
0
R/W
RO
IE0
18
0
2
0
July 26, 2008
END0
R/W
RO
17
0
1
0
R/W
RO
D0
16
0
0
0