LM3S2608 Luminary Micro, Inc, LM3S2608 Datasheet - Page 419

• Manufacturer Part Number: LM3S2608
• Description: Lm3s2608 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

16.4.13
16.4.14
July 26, 2008
There are two possibilities when handling the source of a message interrupt. The first is to read the
IntId bit in the CANINT interrupt register to determine the highest priority interrupt that is pending,
and the second is to read the CAN Message Interrupt Pending (CANMSGnINT) register to see
all of the message objects that have pending interrupts.
An interrupt service routine reading the message that is the source of the interrupt may read the
message and reset the message object's IntPnd at the same time by setting the ClrIntPnd bit
in the CAN IFn Command Mask (CANIFnCMSK) register. When the IntPnd bit is cleared, the
CANINT register will contain the message number for the next message object with a pending
interrupt.
Bit Timing Configuration Error Considerations
Even if minor errors in the configuration of the CAN bit timing do not result in immediate failure, the
performance of a CAN network can be reduced significantly. In many cases, the CAN bit
synchronization amends a faulty configuration of the CAN bit timing to such a degree that only
occasionally an error frame is generated. In the case of arbitration, however, when two or more
CAN nodes simultaneously try to transmit a frame, a misplaced sample point may cause one of the
transmitters to become error passive. The analysis of such sporadic errors requires a detailed
knowledge of the CAN bit synchronization inside a CAN node and of the CAN nodes' interaction on
the CAN bus.
Bit Time and Bit Rate
The CAN system supports bit rates in the range of lower than 1 Kbps up to 1000 Kbps. Each member
of the CAN network has its own clock generator. The timing parameter of the bit time can be
configured individually for each CAN node, creating a common bit rate even though the CAN nodes'
oscillator periods may be different.
Because of small variations in frequency caused by changes in temperature or voltage and by
deteriorating components, these oscillators are not absolutely stable. As long as the variations
remain inside a specific oscillator's tolerance range, the CAN nodes are able to compensate for the
different bit rates by periodically resynchronizing to the bit stream.
According to the CAN specification, the bit time is divided into four segments (see Figure
16-2 on page 420): the Synchronization Segment, the Propagation Time Segment, the Phase Buffer
Segment 1, and the Phase Buffer Segment 2. Each segment consists of a specific, programmable
number of time quanta (see Table 16-3 on page 420). The length of the time quantum (t
the basic time unit of the bit time, is defined by the CAN controller's system clock (fsys) and the
Baud Rate Prescaler (BRP):
t
The CAN module's system clock fsys is the frequency of its CAN module clock input.
The Synchronization Segment Sync_Seg is that part of the bit time where edges of the CAN bus
level are expected to occur; the distance between an edge that occurs outside of Sync_Seg and
the Sync_Seg is called the phase error of that edge.
The Propagation Time Segment Prop_Seg is intended to compensate for the physical delay times
within the CAN network.
The Phase Buffer Segments Phase_Seg1 and Phase_Seg2 surround the Sample Point.
The (Re-)Synchronization Jump Width (SJW) defines how far a resynchronization may move the
Sample Point inside the limits defined by the Phase Buffer Segments to compensate for edge phase
errors.
q
= BRP / fsys
Preliminary
LM3S2608 Microcontroller
q
), which is
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