IDT72V36100L10PF IDT, Integrated Device Technology Inc, IDT72V36100L10PF Datasheet - Page 31
IDT72V36100L10PF
Manufacturer Part Number
IDT72V36100L10PF
Description
IC FIFO 64X36 10NS 128QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet
1.IDT72V36110L7-5BB.pdf
(48 pages)
Specifications of IDT72V36100L10PF
Function
Synchronous
Memory Size
2.3K (64 x 36)
Data Rate
166MHz
Access Time
10ns
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V36100L10PF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT72V36100L10PF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT72V36100L10PF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D - 2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure.
5. There must be at least two words written to the FIFO before a Retransmit operation can be invoked.
6. RM is set HIGH during MRS.
IDT72V36100/72V36110 3.3V HIGH DENSITY SUPERSYNC II
65,536 x 36 and 131,072 x 36
Q
WCLK
0
D = 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110.
RCLK
WEN
REN
1
- Q
PAE
PAF
= first word written to the FIFO after Master Reset, W
HF
EF
RT
n
t
ENS
W
x
t
t
A
ENH
t
ENS
t
RTS
t
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
ENH
REF
HF
t
SKEW2
1
TM
36-BIT FIFO
W
x+1
31
2
t
PAFS
1
t
REF
t
ENS
2
t
t
A
PAES
COMMERCIAL AND INDUSTRIAL
W
TEMPERATURE RANGES
1
(3)
OCTOBER 22, 2008
6117 drw16
t
t
ENH
A
W
2
(3)