AD5232

Manufacturer Part NumberAD5232
Description2-Channel/ 256-Position Digital Potentiometer
ManufacturerAnalog Devices
AD5232 datasheet
 
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5V
OP279
~
V
IN
W
OFFSET
GND
A
DUT
B
OFFSET BIAS
A
W
~
V
IN
DUT
OP42
B
OFFSET
GND
2.5V
0.1V
R
=
SW
DUT
I
SW
CODE = OO
W
B
I
SW
V
TO V
SS
DD
NC
A
V
I
DD
CM
DUT
W
V
GND
SS
B
NC
NC = NO CONNECT
A1
V
DD
RDAC
RDAC
1
W1
W2
NC
~
V
IN
B2
B1 V
SS
C
= 20 log [ V
/ V
TA
OUT
IN
Flash/EEMEM Reliability
The Flash/EE Memory array on the AD5232 is fully qualified
for two key Flash/EE memory characteristics, namely Flash/EE
Memory Cycling Endurance and Flash/EE Memory Data
Retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many Program, Read, and Erase cycles. In real
terms, a single endurance cycle is composed of four indepen-
V
OUT
dent, sequential events. These events are defined as:
a. Initial page erase sequence
b. Read/verify sequence
c. Byte program sequence
d. Second read/verify sequence
During reliability qualification Flash/EE memory is cycled from
00
to FF
+15V
H
H
limit of the on-chip Flash/EE memory.
As indicated in the specification pages of this data sheet, the
V
OUT
AD5232 Flash/EE Memory Endurance qualification has been
carried out in accordance with JEDEC Specification A117 over
–15V
the industrial temperature range of –40 C to +85 C. The results
allow the specification of a minimum endurance figure over supply
and temperature of 100,000 cycles, with an endurance figure of
700,000 cycles being typical of operation at 25 C.
Retention quantifies the ability of the Flash/EE memory to retain
its programmed data over time. Again, the AD5232 has been
H
+
qualified in accordance with the formal JEDEC Retention Life-
0.1V
_
time Specification (A117) at a specific junction temperature
(T
= 55 C). As part of this qualification procedure, the Flash/EE
J
memory is cycled to its specified endurance limit described above,
before data retention is characterized. This means that the Flash/EE
memory is guaranteed to retain its data for its full-specified reten-
tion lifetime every time the Flash/EE memory is reprogrammed. It
should also be noted that retention lifetime, based on an activa-
tion energy of 0.6 eV, will derate with T
300
V
CM
250
200
150
A2
2
100
V
OUT
50
]
0
40
AD5232
until a first fail is recorded, signifying the endurance
as shown in Figure 23.
J
ADI TYPICAL
PERFORMANCE
T
AT
= 55 C
J
50
60
70
80
90
100
T
JUNCTION TEMPERATURE – C
J
110