AD5232

Manufacturer Part NumberAD5232
Description2-Channel/ 256-Position Digital Potentiometer
ManufacturerAnalog Devices
AD5232 datasheet
 
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Parameter
5, 9
DYNAMIC CHARACTERISTICS
Bandwidth
Total Harmonic Distortion
V
Settling Time
W
Resistor Noise Voltage
Analog Crosstalk (C
/C
)
W1
W2
INTERFACE TIMING CHARACTERISTICS – Applies to All Parts
Clock Cycle Time (t
)
CYC
CS Setup Time
CLK Shutdown Time to CS Rise
Input Clock Pulsewidth
Data Setup Time
Data Hold Time
CS to SDO-SPI Line Acquire
CS to SDO-SPI Line Release
11
CLK to SDO Propagation Delay
CLK to SDO Data Hold Time
CS High Pulsewidth
12
CS High to CS High
12
RDY Rise to CS Fall
CS Rise to RDY Fall Time
13
Read/Store to Nonvolatile EEMEM
CS Rise to Clock Rise/Fall Setup
Preset Pulsewidth (Asynchronous)
Preset Response Time to RDY High t
FLASH/EE MEMORY RELIABILITY CHARACTERISTICS
14
Endurance
15
Data Retention
NOTES
1
Typical parameters represent average readings at 25 C and V
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
postions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. I
I
~ 400 A @ V
= 5 V for the R
= 10 k version, I
W
DD
AB
3
INL and DNL are measured at V
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
W
specification limits of 1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 14.
4
Resistor terminals A, B, W have no limitations on polarity with respect to each other. Dual Supply Operation enables ground-referenced bipolar signal adjustment.
5
Guaranteed by design and not subject to production test.
6
Common-mode leakage current is a measure of the dc leakage from any terminal A, B, W to a common-mode bias level of V
7
Transfer (XFR) Mode current is not continuous. Current consumed while EEMEM locations are read and transferred to the RDAC register. See TPC 9.
8
P
is calculated from (I
V
) + (I
V
DISS
DD
DD
SS
9
All dynamic characteristics use V
= +2.5 V and V
DD
10
See timing diagram for location of measured values. All input control voltages are specified with t
of 1.5 V. Switching characteristics are measured using both V
11
Propagation delay depends on value of V
, R
DD
PULL_UP
12
Valid for commands that do not activate the RDY pin.
13
RDY pin low only for instruction commands 8, 9, 10, 2, 3, and the PR hardware pulse: CMD_8 ~ 1 ms; CMD_9,10 ~ 0.12 ms; CMD_2,3 ~ 20 ms. Device operation
at T
= –40 C and V
< 3 V extends the save time to 35 ms.
A
DD
14
Endurance is qualified to 100,000 cycles as per JEDEC Std. 22 method A117 and measured at V
700,000 cycles.
15
Retention lifetime equivalent at junction temperature (T
will derate with junction temperature as shown in Figure 23 in the Flash/EE Memory description section of this data sheet. The AD5232 contains 9,646
transistors. Die size: 69 mil
115 mil, 7,993 sq. mil.
Specifications subject to change without notice
Symbol
Conditions
–3 dB, BW_10 k , R = 10 k
THD
V
= 1 V rms, V
= 0 V, f = 1 kHz,
W
A
B
R
= 10 k
AB
THD
V
=1 V rms, V
= 0 V, f = 1 kHz,
W
A
B
R
= 50 k , 100 k
AB
t
V
= 5 V, V
= 0 V, V
S
DD
SS
A
V
= 0.50% Error Band, Code 00
W
For R
= 10 k /50 k /100 k
AB
e
R
= 5 k , f = 1 kHz
N_WB
WB
Crosstalk (C
/C
) C
W1
W2
V
= V
, V
= 0 V, Measure V
A
DD
B
Adjacent VR Making Full-Scale Code Change
C
V
= V
, V
= 0 V, Measure V
TA
A1
DD
B1
with V
= 5 V p-p @ f = 10 kHz,
W2
Code
= 80
; Code
= FF
1
H
2
5, 10
t
1
t
2
t
3
t
, t
Clock Level High or Low
4
5
t
From Positive CLK Transition
6
t
From Positive CLK Transition
7
t
8
t
9
t
R
= 2.2 k , C
< 20 pF
10
P
L
t
R
= 2.2 k , C
< 20 pF
11
P
L
t
12
t
13
t
14
t
15
t
Applies to Command 2
16
H
t
17
t
Not Shown in Timing Diagram
PRW
PR Pulsed Low to Refreshed
PRESP
Wiper Positions
= 5 V.
DD
~ 50 A for the R
= 50 k and I
~ 25 A for the R
W
AB
W
).
SS
= –2.5 V unless otherwise noted.
SS
= 3 V or 5 V.
DD
, and C
. See applications text.
L
) = 55 C as per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6eV
J
AD5232
1
Min
Typ
500
0.022
0.045
= V
, V
= 0 V,
DD
B
to 80
H
H
0.65/3/6
9
T
with
W
–5
W1
–70
H
20
10
1
10
5
5
0
10
4
0
0.1
, 3
, 9
H
H
10
50
70
100
100
~ 50 A @ V
W
= 100 k version. See Figure 13.
AB
= V
and V
A
DD
/2.
DD
= t
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level
R
F
= 2.7 V, T
= –40 C to +85 C, typical endurance at 25 C is
DD
A
Max Unit
kHz
%
%
s
nV/ Hz
nV-s
dB
ns
ns
t
CYC
ns
ns
ns
40
ns
50
ns
50
ns
ns
ns
t
CYC
ns
0.15 ms
25
ms
ns
ns
s
K Cycles
Years
= 2.7 V and
DD
= V
. DNL
B
SS