AD5232 Analog Devices, AD5232 Datasheet - Page 3

• Manufacturer Part Number: AD5232
• Description: 2-Channel/ 256-Position Digital Potentiometer
• Manufacturer: Analog Devices

Parameter
DYNAMIC CHARACTERISTICS
INTERFACE TIMING CHARACTERISTICS – Applies to All Parts
FLASH/EE MEMORY RELIABILITY CHARACTERISTICS
NOTES
10
11
12
13
14
15
Specifications subject to change without notice
1
2
3
4
5
6
7
8
9
See timing diagram for location of measured values. All input control voltages are specified with t
Propagation delay depends on value of V
Valid for commands that do not activate the RDY pin.
RDY pin low only for instruction commands 8, 9, 10, 2, 3, and the PR hardware pulse: CMD_8 ~ 1 ms; CMD_9,10 ~ 0.12 ms; CMD_2,3 ~ 20 ms. Device operation
Endurance is qualified to 100,000 cycles as per JEDEC Std. 22 method A117 and measured at V
Retention lifetime equivalent at junction temperature (T
Typical parameters represent average readings at 25 C and V
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
INL and DNL are measured at V
Resistor terminals A, B, W have no limitations on polarity with respect to each other. Dual Supply Operation enables ground-referenced bipolar signal adjustment.
Guaranteed by design and not subject to production test.
Common-mode leakage current is a measure of the dc leakage from any terminal A, B, W to a common-mode bias level of V
Transfer (XFR) Mode current is not continuous. Current consumed while EEMEM locations are read and transferred to the RDAC register. See TPC 9.
P
All dynamic characteristics use V
postions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. I
I
specification limits of 1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 14.
of 1.5 V. Switching characteristics are measured using both V
at T
700,000 cycles.
will derate with junction temperature as shown in Figure 23 in the Flash/EE Memory description section of this data sheet. The AD5232 contains 9,646
transistors. Die size: 69 mil
W
Bandwidth
Total Harmonic Distortion
V
Resistor Noise Voltage
Analog Crosstalk (C
Clock Cycle Time (t
CS Setup Time
CLK Shutdown Time to CS Rise
Input Clock Pulsewidth
Data Setup Time
Data Hold Time
CS to SDO-SPI Line Acquire
CS to SDO-SPI Line Release
CLK to SDO Propagation Delay
CLK to SDO Data Hold Time
CS High Pulsewidth
CS High to CS High
RDY Rise to CS Fall
CS Rise to RDY Fall Time
Read/Store to Nonvolatile EEMEM
CS Rise to Clock Rise/Fall Setup
Preset Pulsewidth (Asynchronous)
Preset Response Time to RDY High t
Endurance
Data Retention
DISS
W
~ 400 A @ V
A
Settling Time
is calculated from (I
= –40 C and V
14
DD
= 5 V for the R
15
DD
< 3 V extends the save time to 35 ms.
DD
W1
12
CYC
12
/C
115 mil, 7,993 sq. mil.
)
V
W2
DD
DD
W
AB
)
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
) + (I
= +2.5 V and V
= 10 k version, I
DD
SS
11
5, 9
, R
13
V
PULL_UP
SS
Symbol
THD
THD
t
e
C
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
).
S
2
6
7
PRW
PRESP
1
3
8
10
11
12
17
N_WB
9
13
14
15
16
4
TA
, t
SS
, and C
= –2.5 V unless otherwise noted.
5
W
W
W
J
) = 55 C as per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6eV
~ 50 A for the R
DD
L
DD
. See applications text.
= 5 V.
= 3 V or 5 V.
Conditions
–3 dB, BW_10 k , R = 10 k
V
R
V
R
V
V
For R
R
Crosstalk (C
V
Adjacent VR Making Full-Scale Code Change
V
with V
Code
Clock Level High or Low
From Positive CLK Transition
From Positive CLK Transition
R
R
Applies to Command 2
Not Shown in Timing Diagram
PR Pulsed Low to Refreshed
Wiper Positions
AB
DD
A
A
A
AB
W
WB
A1
P
P
= V
= 1 V rms, V
=1 V rms, V
= 2.2 k , C
= 2.2 k , C
= 0.50% Error Band, Code 00
= V
= 10 k
= 50 k , 100 k
= 5 V, V
= 5 k , f = 1 kHz
1
AB
DD
W2
= 80
DD
AB
= 10 k /50 k /100 k
, V
= 5 V p-p @ f = 10 kHz,
= 50 k and I
, V
H
B
W1
; Code
SS
= 0 V, Measure V
B1
5, 10
/C
L
L
= 0 V, V
B
= 0 V, Measure V
B
< 20 pF
< 20 pF
= 0 V, f = 1 kHz,
W2
= 0 V, f = 1 kHz,
2
) C
= FF
W
~ 25 A for the R
H
A
, 3
T
DD
R
= V
H
= t
H
= 2.7 V, T
, 9
DD
F
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level
W
H
, V
with
W1
B
H
= 0 V,
to 80
A
AB
= –40 C to +85 C, typical endurance at 25 C is
= 100 k version. See Figure 13.
H
DD
Min
20
10
1
10
5
5
0
10
4
0
10
50
100
/2.
W
~ 50 A @ V
A
Typ
500
0.022
0.045
0.65/3/6
9
–5
–70
0.1
70
100
= V
DD
1
and V
AD5232
Max Unit
40
50
50
0.15 ms
25
DD
= 2.7 V and
B
= V
kHz
%
%
nV-s
dB
ns
ns
t
ns
ns
ns
ns
ns
ns
ns
ns
t
ns
ms
ns
ns
K Cycles
Years
nV/ Hz
SS
CYC
CYC
s
s
. DNL