AD5532-1 Analog Devices, AD5532-1 Datasheet

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AD5532-1

Manufacturer Part Number
AD5532-1
Description
32-Channel/ 14-Bit Voltage-Output DAC
Manufacturer
Analog Devices
Datasheet
a
Protected by U.S. Patent No. 5,969,657; other patents pending.
TRACK / RESET
DAC GND
SER / PAR
DGND
AGND
BUSY
V
IN
AD5532
SCLK
INTERFACE
CONTROL
LOGIC
DV
FUNCTIONAL BLOCK DIAGRAM
MUX
ADC
D
CC
IN
D
AV
OUT
CC
REF IN
SYNC / CS
DAC
DAC
DAC
REF OUT
GENERAL DESCRIPTION
The AD5532 is a 32-channel voltage-output 14-bit DAC with
an additional infinite sample-and-hold mode. The selected DAC
register is written to via the 3-wire serial interface and V
for this DAC is then updated to reflect the new contents of the
DAC register. DAC selection is accomplished via address bits
A0–A4. The output voltage range is determined by the offset
voltage at the OFFS_IN pin and the gain of the output amplifier.
It is restricted to a range from V
of the headroom of the output amplifier.
The device is operated with AV
to 5.25 V, V
and requires a stable +3 V reference on REF_IN as well as an
offset voltage on OFFS_IN.
PRODUCT HIGHLIGHTS
1. 32-channel, 14-bit DAC in one package, guaranteed
2. The AD5532 is available in a 74-lead LFBGA package with
3. Droopless/Infinite Sample-and-Hold Mode.
monotonic.
a body size of 12 mm × 12 mm.
ADDRESS INPUT REGISTER
A4 –A0
OFFS IN
CAL
SS
= –4.75 V to –16.5 V and V
OFFSET SEL
V
DD
V
Voltage-Output DAC
SS
32-Channel, 14-Bit
WR
V
V
OFFS OUT
CC
SS
OUT
OUT
+ 2 V to V
= 5 V ± 5%, DV
0
31
AD5532
DD
DD
= 8 V to 16.5 V
– 2 V because
CC
= 2.7 V
OUT

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AD5532-1 Summary of contents

Page 1

... V, V and requires a stable +3 V reference on REF_IN as well as an offset voltage on OFFS_IN. PRODUCT HIGHLIGHTS 1. 32-channel, 14-bit DAC in one package, guaranteed monotonic. 2. The AD5532 is available in a 74-lead LFBGA package with a body size × 12 mm. 3. Droopless/Infinite Sample-and-Hold Mode. FUNCTIONAL BLOCK DIAGRAM DV AV ...

Page 2

... V CC High Impedance Leakage Current High Impedance Output Capacitance ( 16 –4. –16 – All outputs unloaded. All specifications Version AD5532-1/-3/-5 AD5532-2 Only 14 14 ± 0.39 ± 0.39 ± 1 ± 1 90/170/250 180/350/500 3.52 7 ± 2 ± 2 3.0 3 ...

Page 3

... Ensure that you do not exceed T 6 Output unloaded. Specifications subject to change without noti 2 A Version AD5532-1/-3/-5 AD5532-2 Only ± 0.018 ± 0.018 ± 50 ± 100 3.46/3.52/3.6 6.88/7/7. ...

Page 4

... AD5532 TIMING CHARACTERISTICS PARALLEL INTERFACE Limit MIN MAX 1, 2 Parameter (A Version NOTES 1 See Interface Timing Diagram. 2 Guaranteed by design and characterization, not production tested. Specifications subject to change without notice. SERIAL INTERFACE Limit at T ...

Page 5

... SYNC MSB t 1 SCLK SYNC OUT MSB AD5532 LSB LSB LSB 1 ...

Page 6

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD5532 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 7

... OFFS_IN F1 VO25 F2 VO21 F10 AGND2 F11 VO6 G1 VO24 G2 VO8 G10 VO5 G11 VO3 H1 VO23 H2 VIN H10 VO4 H11 VO7 J1 VO22 J2 VO19 J6 VSS2 AD5532 LFBGA Ball Number Name J10 VO9 J11 VO11 K1 VO17 K2 VO15 K3 VO27 K4 VSS3 K5 VSS1 K6 ...

Page 8

... AD5532 Pin Function AGND (1–2) Analog GND Pins. AV (1–2) Analog Supply Pins. Voltage range from 4. 5. (1–4) V Supply Pins. Voltage range from 16 (1–4) V Supply Pins. Voltage range from –4. –16 DGND Digital GND Pins. ...

Page 9

... Gain × REFIN) Full-Scale Error = V OUT(Full-Scale) where Ideal Gain = 3.52 for AD5532-1/-3/-5 Ideal Gain = 7 for AD5532-2 Output Settling Time This is the time taken from when the last data bit is clocked into the DAC until the output has settled to within ± 0.39%. ...

Page 10

... AD5532 –Typical Performance Characteristics 1 REFIN 0 OFFS_IN 0.6 A 0.4 0.2 0.0 –0.2 –0.4 –0.6 –0.8 –1 10k 12k 14k 16k DAC CODE 3.535 REFIN 3.530 3.525 3.520 –2 –4 –6 SINK/SOURCE CURRENT – mA 0.0024 ...

Page 11

... The following table shows how the output range the offset voltage supplied by the user: Table I. Sample Output Voltage Ranges OFFS_IN DAC OUT (V) (V) (AD5532-1/-3/-5) 0 –1. –2.52 to +8. limited only by the headroom of the output amplifiers. OUT V must be within maximum ratings. ...

Page 12

... IN is then switched from V to the output of the DAC. IN MODES OF OPERATION The AD5532 can be used in four different modes of opera- tion. These modes are set by two mode bits, the first two bits in the serial word. Table II. Modes of Operation Mode Bit 1 Mode Bit 2 ...

Page 13

... DSPs and microcontrollers. Figures 3, 4, and 5 show the timing diagram for a serial read and write to the AD5532. The serial interface works with both a con- tinuous and a noncontinuous serial clock. The first falling edge of SYNC resets a counter that counts the number of serial clocks to ensure the correct number of bits are shifted in and out of the serial shift registers ...

Page 14

... DSP’s serial clock and clocked into the AD5532 on the falling edge of its SCLK. In readback 16 bits of data are clocked out of the AD5532 on each rising edge of SCLK and clocked into the DSP on the rising edge of SCLK ignored ...

Page 15

... SYSTEM BUS DACs Typical Application Circuit (SHA Mode) The AD5532 can be used to set up voltage levels on 32 channels as shown in the circuit below. An AD780 provides the 3 V refer- ence for the AD5532, and for the AD5541 16-bit DAC. A simple 3-wire interface is used to write to the AD5541. The DAC output is buffered by an AD820 ...

Page 16

... AD5532 0.067 (1.70) MAX CONTROLLING DIMENSIONS ARE IN MILLIMETERS OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 74-Lead LFBGA (BC-74) 0.394 (10.00) BSC 0.472 (12.00) BSC 0.472 BOTTOM (12.00) TOP VIEW 0.039 BSC (1.00) BSC 0.039 (1.00) BSC DETAIL A DETAIL A 0.010 (0.25) MIN 0.024 (0.60) BSC BALL DIAMETER ...

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