ds7505 Maxim Integrated Products, Inc., ds7505 Datasheet - Page 8

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ds7505

Manufacturer Part Number
ds7505
Description
High-precision Digital Thermometer And Thermostat
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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The configuration register allows the user to program
various DS7505 options such as conversion resolution,
thermostat fault tolerance, thermostat polarity, thermo-
stat operating mode, and shutdown mode. The configu-
ration register is arranged as shown in Figure 5 and
detailed descriptions of each bit are provided in Table
2. The user has read/write access to all bits in the con-
figuration register except the MSB (NVB bit), which is a
Digital Thermometer and Thermostat
Figure 5. Configuration Register
Table 2. Configuration Register Bit Descriptions
8
NVB
NV Memory Status
R1
Conversion Resolution Bit 1
R0
Conversion Resolution Bit 0
F1
Thermostat Fault Tolerance Bit 1
F0
Thermostat Fault Tolerance Bit 0
POL
Thermostat Output (O.S.) Polarity
TM
Thermostat Operating Mode
SD
Shutdown
_______________________________________________________________________________________
BIT NAME
Configuration Register
MSB
NVB
Bit 6
R1
Power-up state = 0, read only
NVB = 1—Write to an NV memory cell is in progress.
NVB = 0—NV memory is not busy.
Factory power-up state = 0
Sets conversion resolution (see Table 3).
Factory power-up state = 0
Sets conversion resolution (see Table 3).
Factory power-up state = 0
Sets the thermostat fault tolerance (see Table 4).
Factory power-up state = 0
Sets the thermostat fault tolerance (see Table 4).
Factory power-up state = 0
POL = 0—O.S. is active low.
POL = 1—O.S. is active high.
Factory power-up state = 0
TM = 0—Comparator mode.
TM = 1—Interrupt mode.
See the Operation—Thermostat section for a detailed description of these modes.
Factory power-up state = 0
SD = 0—Active conversion and thermostat operation.
SD = 1—Shutdown mode.
See the Shutdown Mode section for a detailed description of this mode.
Bit 5
R0
Bit 4
F1
read-only bit. All bits in the register but the NVB bit are
NV EEPROM backed by shadow SRAM, and thus
power-up in their programmed state. Once written to
the shadow SRAM, values can be stored in EEPROM
by issuance of a Copy Data command from the master
(see the Command Set section for more details). If the
values are not copied to the EEPROM, the device pow-
ers up with the factory default settings or the last values
that were copied to the EEPROM. The NVB bit is SRAM
and powers up in the state shown in Table 2.
Bit 3
F0
FUNCTIONAL DESCRIPTION
Bit 2
POL
Bit 1
TM
LSB
SD

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