74LVT16374MTD Fairchild Semiconductor, 74LVT16374MTD Datasheet - Page 5

IC FLIP FLOP 16BIT D 3ST 48TSSOP

74LVT16374MTD

Manufacturer Part Number
74LVT16374MTD
Description
IC FLIP FLOP 16BIT D 3ST 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LVTr
Type
D-Type Busr
Datasheet

Specifications of 74LVT16374MTD

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
8
Frequency - Clock
160MHz
Delay Time - Propagation
4.5ns
Trigger Type
Positive Edge
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVT16374MTDX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Company:
Part Number:
74LVT16374MTDX
Quantity:
4 000
V
V
f
t
t
t
t
t
t
t
t
t
t
t
C
C
I
I
I
I
'
MAX
PHL
PLH
PZL
PZH
PLZ
PHZ
S
H
W
OSHL
OSLH
DC Electrical Characteristics
CCH
CCL
CCZ
CCZ
Note 5: Applies to bushold versions only (74LVTH16374).
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V
Dynamic Switching Characteristics
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n
AC Electrical Characteristics
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
Capacitance
Note 12: Capacitance is measured at frequency f
OLP
OLV
I
Symbol
IN
OUT
Symbol
Symbol
CC

Symbol
Maximum Clock Frequency
Propagation Delay
CP to O
Output Enable Time
Output Disable Time
Setup Time
Hold Time
Pulse Width
Output to Output Skew (Note 11)
Power Supply Current
Power Supply Current
Power Supply Current
Power Supply Current
Increase in Power Supply Current
(Note 8)
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
n
Input Capacitance
Output Capacitance
(Note 12)
Parameter
Parameter
Parameter
Parameter

1 data inputs are driven 0V to 3V. Output under test held LOW.
OL
1 MHz, per MIL-STD-883, Method 3012.
OL
V
(V)
3.3
3.3
V
V
(Continued)
CC
CC
CC
Open, V
3.0V, V
V
(V)
3.6
3.6
3.6
3.6
3.6
CC
Min
(Note 9)
5
O
I
Min
160
1.9
1.6
1.3
1.0
1.5
2.0
1.8
0.8
3.0
V
Conditions
CC
0V or V
0V or V
T
A
T
A
T
Min
3.3V
A

40
OSHL

Typ
CC
CC

0.8
0.8
40
25
q
r
C to
) or LOW-to-HIGH (t
q
q
0.3V
C to
C
Max
4.3
4.5
4.4
4.5
4.6
5.0
1.0
1.0

85
Max
0.19
0.19
0.19

0.2
85
5
q
C, C
Max
q
C
CC
L
or GND.
50 pF, R
Min
160
1.9
1.6
1.3
1.0
1.5
2.0
2.0
0.1
3.0
OSLH
Units
Units
mA
mA
mA
mA
mA
V
V
V
).
CC
Typical
L
4
8
2.7V
Outputs HIGH
Outputs LOW
Outputs Disabled
V
Outputs Disabled
One Input at V
Other Inputs at V
500
CC
C
:
www.fairchildsemi.com
d
L
Max
4.6
5.2
5.0
5.4
4.8
5.4
1.0
1.0
V
O
50 pF, R
Conditions
Conditions
(Note 10)
(Note 10)
d
5.5V,
CC
L
CC

Units
pF
pF
0.6V
Units
or GND
500
MHz
ns
ns
ns
ns
ns
ns
ns
:

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