upd72862 Renesas Electronics Corporation., upd72862 Datasheet - Page 9

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upd72862

Manufacturer Part Number
upd72862
Description
Ieee1394 Ohci Host Controller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.2 PCI/Cardbus Select Signals: (2 pins)
PME
CLKRUN
INTA
PERR
SERR
PRST
PCLK
CARD_ON
CIS_ON
Name
Name
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
79
78
80
16
17
81
82
54
45
Pin No.
Pin No.
PCI/Cardbus
PCI/Cardbus
PCI/Cardbus
PCI/Cardbus
PCI/Cardbus
I
I
OL
OL
-
-
-
-
Volts(V)
Volts(V)
Data Sheet S14265EJ2V0DS00
5/3.3
5/3.3
5/3.3
5/3.3
5/3.3
5/3.3
5/3.3
3.3
3.3
PME Output for power management enable.
Caution The PME pin is not an N-channel open drain structure pin.
PCICLK Running as input, to determine the status of PCLK; as
output, to request starting or speeding up clock.
Interrupt the PCI interrupt request A.
Parity Error is used for reporting data parity errors during all PCI
transactions, except a Special Cycle. It is an output when AD0-
AD31 and PAR are both inputs. It is an input when AD0-AD31 and
PAR are both outputs.
System Error is used for reporting address parity errors, data parity
errors during the Special Cycle, or any other system error where the
effect can be catastrophic. When reporting address parity errors, it
is an output.
Reset PCI reset
PCI Clock 33 MHz system bus clock.
PCI/Card Select (1:Cardbus, 0:PCI bus)
CIS Register ON
CARD_ON
0
0
1
Therefore, when using S3, S4, S5 state in ACPI, a
circuit that can separate between the power supply
and the PME pin externally is needed.
ACPI: Advanced Configuration and Power Interface.
Please refer to ACPI Specification.
CIS_ON
1
0
X
Function
Function
CIS
off
on
on
CSTSCHG
CSTSCHG
PME
PME
PD72862
(2/2)
9

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