74HCT109D,652 NXP Semiconductors, 74HCT109D,652 Datasheet

IC DUAL JK POS-EDG-TRG FF 16SOIC

74HCT109D,652

Manufacturer Part Number
74HCT109D,652
Description
IC DUAL JK POS-EDG-TRG FF 16SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
JK Typer
Datasheet

Specifications of 74HCT109D,652

Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
55MHz
Delay Time - Propagation
13ns
Trigger Type
Positive Edge
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Other names
74HCT109D
74HCT109D
933714960652
Product specification
Supersedes data of December 1990
File under Integrated Circuits, IC06
DATA SHEET
74HC/HCT109
Dual JK flip-flop with set and reset;
positive-edge trigger
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
INTEGRATED CIRCUITS
1997 Nov 25

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74HCT109D,652 Summary of contents

Page 1

DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification ...

Page 2

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger FEATURES J, K inputs for easy D-type flip-flop Toggle flip-flop or “do nothing” mode Output capability: standard I category: flip-flops CC GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS ...

Page 3

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger PIN DESCRIPTION PIN NO. SYMBOL 14 1J, 2J, 1K 1CP, 2CP 1Q ...

Page 4

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger Fig.4 Functional diagram. handbook, full pagewidth Fig.5 Logic diagram (one flip-flop). PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines” 1997 Nov 25 FUNCTION TABLE OPERATING ...

Page 5

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC AC CHARACTERISTICS FOR 74HC GND = ...

Page 6

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC AC CHARACTERISTICS FOR 74HCT GND = ...

Page 7

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger AC WAVEFORMS The shaded areas indicate when the input is permitted to change for predictable output performance. Fig.6 Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, ...

Page 8

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one ...

Page 9

Philips Semiconductors Dual JK flip-flop with set and reset; positive-edge trigger DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be ...

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