sm5351af1 Seiko NPC Corp., sm5351af1 Datasheet
sm5351af1
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sm5351af1 Summary of contents
Page 1
... S2 discriminator function, and 1-system D-terminal dis- criminator function, and these discriminated status can read via I muting function can be controlled individually for each block using the I is set using the ADS pin, allowing a maximum of two SM5351AF1 devices to be controlled simultaneously. 2 *1. I C-BUS is a registered trademark of NXP B ...
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... GND1 LV1 LV2 LV2 LV3 LV4 LV5 VCCA1 RV1 RV2 RV3 RV4 RV5 GND2 SM5351AF1 3rd order LPF 6.75MHz/13.5MHz/ 30MHz/Bypass 3rd order LPF 6.75MHz/13.5MHz/ 30MHz/Bypass 3rd order LPF 6.75MHz/13.5MHz/ 30MHz/Bypass Control Logic SEIKO NPC CORPORATION —2 VCC3 6dB ...
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... I C-BUS clock signal pin. Connect pull-up to supply line The SM5351AF1 corresponds to the I voltage C-BUS data signal pin. Connect pull-up to supply line of I The SM5351AF1 corresponds to the I D voltage. The output is open-drain C-BUS interface-stage supply pin A Video block supply pin 2 ...
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... GND7 GND 63 IREF O 64 VREF2 O *1. I: input, O: output, P: Power supply, GND: Ground *2. A: analog, D: digital SM5351AF1 *2 A/D Description A Composite video signal input pin 3 D Composite video signal connecting discriminator input pin 4 A Composite video signal input pin 4 D S-video terminal connecting discriminator pin 1 ...
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... LV2 8 LV3 9 LV4 10 LV5 I 11 RV1 12 RV2 13 RV3 14 RV4 15 RV5 18 ROUT O 20 LOUT 21 ADS I SM5351AF1 Equivalent circuit VCCA VCCA 10kΩ 100kΩ VCCA VCCA 300Ω 60kΩ 4V VCCA VCCA 50Ω 50Ω VDD VDD 200Ω SEIKO NPC CORPORATION —5 ...
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... YOUT 33 VC1 35 VC2 37 VC3 39 VC4 I 41 S-1 45 S-2 50 D1SW 58 D2SW SY1 46 SY2 51 DY1 59 DY2 SM5351AF1 Equivalent circuit VDD VDD 200Ω VCC VCC 200kΩ 10kΩ VCC 1kΩ 200Ω 1kΩ 1kΩ SEIKO NPC CORPORATION —6 ...
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... DCr1 60 DCb2 61 DCr2 63 IREF O 64 VREF2 O *1. I: input, O: output Note. Resistance values in the equivalent circuits indicate design values. SM5351AF1 Equivalent circuit VCC 10kΩ 200kΩ VCC 60kΩ 200Ω 50kΩ 60kΩ VCC 200Ω 200Ω VCC VCC 5kΩ ...
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... Parameter Symbol Supply voltage Supply voltage 2 V CCA Operating ambient temperature Ta SM5351AF1 , VCCA1 = VCCA2 = V CC CCA Condition VCC1, VCC2, VCC3, VCC4, VDD VCCA1, VCCA2 V1, V2, V3, V4, SY1, SC1, SY2, SC2, DY1, DCb1, DCr1, DY2, DCb2, DCr2, VC1, VC2, VC3, VC4, S-1, S2-1, S-2, ...
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... HIGH-level input voltage 8 V IH8 LOW-level Input voltage 8 V IL8 HIGH-level input leakage current I LH LOW-level input leakage current I LL LOW-level output voltage 1 V OL1 SM5351AF1 = 5.0V, fin = 100kHz 1.0Vp- 600 Ω , unless otherwise noted RMS L Condition min Filter = 00h, 01h, 02h, – ...
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... Bus free time (between stop t BUF condition to start condition) SDA, SCL input capacitance C i SDA LOW SCL t t HD;STA HD;DAT S Figure 1. I SM5351AF1 Condition min 0 0.6 1.3 0.6 0.6 0 SDA output hold delay time referred 0 minimum level of SCL falling IH2 100 − − 0.6 1.3 – ...
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... CH Input multiplexer crosstalk XTLK MUX Drive load resistance response time t IIC SM5351AF1 = 1.0Vp- Condition min V1, V2, V3, V4, SY1, SY2, DY1, DY2 SC1, SC2, DCb1, DCr1, DCb2, DCr2 SC1, SC2, DCb1, DCr1, DCb2, DCr2 THD < 1.0% = 1.0Vp- Condition min 5 ...
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... BW Total harmonic distortion THD + N Test Level The definition of “Test Level” shown in the electric characteristic table is as follows 100% of products tested 25° Guaranteed as result of design and characteristics evaluation. SM5351AF1 = 1.0Vp- Condition min Filter = 02h, fin = 30MHz/100kHz, –1.0 YOUT, CbOUT, CrOUT Filter = 01h, fi ...
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... DCb2 1µF DCr2 GND7 39kΩ IREF VREF2 + 10µF 10µF Note. This figure is a circuit only for the evaluation board of an electric characteristics. (It is not a recommended application circuit.) SM5351AF1 V CC GND5 VCC3 YOUT GND4 CbOUT CrOUT VCC2 VDD SDA SCL ...
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... DCb2 75Ω 1µF DCr2 75Ω GND7 39kΩ IREF VREF2 + 10µF 10µF Audio input #1 Audio input #2 Audio input #3 Audio input #4 Audio input #5 SM5351AF1 V CC GND5 VCC3 YOUT GND4 CbOUT CrOUT VCC2 VDD SDA SCL VSS ADS LOUT GND3 ROUT VCCA2 SEIKO NPC CORPORATION — ...
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... The write sequence is: SM5351AF1 slave address → specific control register sub-address → write data. Data can be written to the SM5351AF1 in successive bytes, as the sub-address for the register is incremented auto- matically after each byte. However, if the sub-address exceeds the address of the last register (02h), data write operation to the SM5351AF1 register stops and the acknowledge signal is not returned ...
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... Slave Address, Sub-address The 7-bit slave address is selected using the ADS pin. When ADS = “L” the address is 48h (1001000b), and when ADS = “H” the address is 49h (1001001b). A maximum of two SM5351AF1 devices can be connected to 2 one I C-BUS simultaneously, and controlled independently by setting the slave address of each using the ADS pin ...
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... Control Register The SM5351AF1 has a 3-byte control register. Register assign sub addr. bit7 bit6 bit5 bit4 00h 01h 02h The function of each byte in the control register is described in the following tables. Register name: VIDEO Sub-address: 00h, bit3 to bit0 Control Register sub addr ...
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... Status Register SM5351AF1 has a 3-byte status register. Register assign sub addr. bit7 bit6 bit5 bit4 00h VC1 VC2 VC3 VC4 01h S2-1 D1L1 02h S2-2 0 The function of each byte in the status register is described in the following tables. Register name: VC1, VC2, VC3, VC4 Sub-address: 00h, bit7 to bit4 ...
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... Returns the discriminated result of S2 signals. (It discriminates DC voltage of S2-1 or S2-2 pin. These pins are pulled-down in IC internally.) SM5351AF1 Description Connector of D-terminal 1 is disconnected. Connector of D-terminal 1 is connected. Description Connector of D-terminal 2 is disconnected. Connector of D-terminal 2 is connected. Description S-1 < ...
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... There is no relationship in the order of the startup or fall of V CCA 2 power supply. I C-BUS interface (SDA and SCL pin) and control logic circuit uses V pin). The SM5351AF1 corresponds to the I V power supply (4.75V to 5.25V). When V CC IREF Pin It should be connected a 3.9kΩ ± 1% resistor between IREF pin and GND, because it control internal reference current. The current fl ...
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... Bypass –24 –30 –36 –42 –48 –54 0 Frequency [MHz] Figure 4. Video block: gain vs. frequency 1 0.1 0.01 0.001 0.0001 0.01 0.1 Frequency [kHz] Figure 6. Audio block: THD + N vs. frequency SM5351AF1 100 1000 0 Figure 5. Video block: group delay vs. frequency 1.0V IN RMS V = 9.0V CCA ...
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... Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. SM5351AF1 SEIKO NPC CORPORATION 15-6, Nihombashi-kabutocho, Chuo-ku, ...