sm5907af Seiko NPC Corp., sm5907af Datasheet - Page 3

• Manufacturer Part Number: sm5907af
• Description: Compression And Non Compression Type Shock-proof Memory Controller
• Manufacturer: Seiko NPC Corp.

Pin description
Pin number
Ip : Input pin with pull-up resistor
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
1
2
3
4
5
6
7
8
9
ZSRDATA
YSRDATA
YDMUTE
YMDATA
Pin name
YBLKCK
NRESET
(NCAS2)
ZSENSE
YMCLK
NCAS3
NTEST
YLRCK
ZLRCK
YFLAG
YFCLK
YMLD
VDD2
VDD1
NCAS
NRAS
YSCK
ZSCK
NWE
UC1
UC2
UC3
UC4
UC5
CLK
VSS
A10
D2
D3
D0
D1
A9
A8
A7
A6
A5
A4
A0
A1
A2
A3
Ip/O : Input/Output pin (With pull-up resistor when in input mode)
Ip/O
Ip/O
Ip/O
Ip/O
Ip/O
Ip/O
Ip/O
Ip/O
Ip/O
I/O
O
Ip
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
-
I
-
I
I
I
I
I
I
I
-
I
I
I
I
DRAM2 CAS control (with two 16M DRAMs)
DRAM2 CAS control (with two 4M DRAMs)
Microcontroller interface extension I/O 1
Microcontroller interface extension I/O 2
Microcontroller interface extension I/O 3
Microcontroller interface extension I/O 4
Microcontroller interface extension I/O 5
Signal processor IC RAM overflow flag
Microcontroller interface status output
Microcontroller interface latch clock
Microcontroller interface shift clock
Microcontroller interface serial data
SM5907AF
Crystal-controlled frame clock
Audio serial output bit clock
Audio serial output LR clock
DRAM data input/output 2
DRAM data input/output 3
DRAM data input/output 0
DRAM data input/output 1
Audio serial input LR clock
Audio serial input bit clock
Subcode block clock signal
16.9344 MHz clock input
Audio serial output data
Audio serial input data
DRAM CAS control
DRAM RAS control
DRAM WE control
DRAM address 10
DRAM address 9
DRAM address 8
DRAM address 7
DRAM address 6
DRAM address 5
DRAM address 4
DRAM address 0
DRAM address 1
DRAM address 2
DRAM address 3
VDD supply pin
VDD supply pin
Forced mute pin
System reset pin
Function
Test pin
Ground
NIPPON PRECISION CIRCUITS-3
Left channel
Left channel
Mute
H
Setting
Right channel
Right channel
Overflow
Reset
Test
L