S25FL040A Meet Spansion Inc., S25FL040A Datasheet - Page 13

• Manufacturer Part Number: S25FL040A
• Description: Small Sector For Boot And Parameter Storage 4-megabit Cmos 3.0 Volt Flash Memory With 50 Mhz Spi Bus Interface
• Manufacturer: Meet Spansion Inc.

7.6
July 2, 2007 S25FL040A_00_B2
Data Protection Modes
Spansion SPI Flash memory devices provide the following data protection methods:
Block Protect Bits
Block Protect Bits
BP2
BP2
Status Register
Status Register
0
0
0
0
1
1
1
1
The Write Enable (WREN) command: Must be written prior to any command that modifies data. The
WREN command sets the Write Enable Latch (WEL) bit. The WEL bit resets (disables writes) on power-up
or after the device completes the following commands:
Software Protected Mode (SPM): The Block Protect (BP2, BP1, BP0) bits define the section of the
memory array that can be read but not programmed or erased.
address ranges of protected areas that are defined by Status Register bits BP2:BP0.
Hardware Protected Mode (HPM): The Write Protect (W#) input and the Status Register Write Disable
(SRWD) bit together provide write protection.
Clock Pulse Count: The device verifies that all program, erase, and Write Status Register commands
consist of a clock pulse count that is a multiple of eight before executing them.
0
0
0
0
1
1
1
1
– Page Program (PP)
– Sector Erase (SE)
– Bulk Erase (BE)
– Write Disable (WRDI)
– Write Status Register (WRSR)
BP1
BP1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
BP0
BP0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Address Range
Address Range
7C000–7FFFF
78000–7FFFF
70000–7FFFF
60000–7FFFF
40000–7FFFF
00000–7FFFF
00000–7FFFF
00000–03FFF
00000–07FFF
00000–0FFFF
00000–1FFFF
00000–3FFFF
00000–7FFFF
00000–7FFFF
Protected
Protected
Table 7.2 S25FL040A Protected Area Sizes (Bottom Boot)
D a t a
None
None
Table 7.1 S25FL040A Protected Area Sizes (Top Boot)
S h e e t
(2) SA12:SA11
(13) SA12:SA0
(13) SA12:SA0
(13) SA12:SA0
(13) SA12:SA0
(6) SA12:SA7
(7) SA12:SA6
(9) SA12:SA4
S25FL040A
(2) SA1:SA0
(6) SA5:SA0
(7) SA6:SA0
(9) SA8:SA0
Protected
Protected
(1) SA12
(0) None
Sectors
Sectors
(1) SA0
(0)
Memory Array
Memory Array
Address Range
Address Range
00000–7BFFF
00000–7FFFF
00000–77FFF
00000–6FFFF
00000–5FFFF
00000–3FFFF
00000–7FFFF
04000–7FFFF
08000–7FFFF
10000–7FFFF
20000–7FFFF
40000–7FFFF
Unprotected
Unprotected
None
None
None
None
Table 7.1
Unprotected
Unprotected
SA12:SA0
SA11:SA0
SA10:SA0
SA12:SA0
SA12:SA1
SA12:SA2
SA12:SA4
SA12:SA5
SA12:SA7
and
SA6:SA0
SA5:SA0
SA3:SA0
Sectors
Sectors
None
None
None
None
Table 7.2
Protected Portion of
Protected Portion of
Total Memory Area
Total Memory Area
Upper 1/32 (16 KB)
Upper 1/16 (32 KB)
Upper 1/4 (128 KB)
Upper 1/2 (256 KB)
Lower 1/32 (16 KB)
Lower 1/16 (32 KB)
Lower 1/4 (128 KB)
Lower 1/2 (256 KB)
Upper 1/8 (64 KB)
Lower 1/8 (64 KB)
show the sizes and
All (512 KB)
All (512 KB)
All (512 KB)
All (512 KB)
None (0)
0
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