MD51V65400E Oki Semiconductor, MD51V65400E Datasheet

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MD51V65400E

Manufacturer Part Number
MD51V65400E
Description
16,777,216-word ? 4-bit Dynamic Ram Fast Page Mode Type
Manufacturer
Oki Semiconductor
Datasheet
DESCRIPTION
The MSD51V65400E is a 16,777,216-word × 4-bit dynamic RAM fabricated in Oki’s silicon-gate
CMOS technology. The MD51V65400E achieves high integration, high-speed operation, and
low-power
polysilicon/double-layer metal CMOS process. The MD51V65400E is available in a 32-pin plastic SOJ
or 32-pin plastic TSOP.
FEATURES
·
·
·
·
·
·
· CAS before RAS refresh, hidden refresh, RAS-only refresh capability
· Packages
PRODUCT FAMILY
OKI Semiconductor
MD51V65400E
16,777,216-Word × 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
16,777,216-word × 4-bit configuration
Single 3.3V power supply, ±0.3V tolerance
Input
Output : LVTTL compatible, 3-state
Refresh :
Fast page mode, read modify write capability
32-pin 400mil plastic SOJ
32-pin 400mil plastic TSOP
MD51V65400E
Family
: LVTTL compatible, low input capacitance
RAS
CAS
consumption
only refresh:
before
RAS
50ns
60ns
t
RAC
refresh, hidden refresh :4096 cycles/64ms
because
Access Time (Max.)
25ns
30ns
t
AA
(
(
SOJ32-P-400-1.27
TSOPII32-P-400-1.27-K
Oki
13ns
15ns
t
CAC
manufactures
:4096 cycles/64ms
13ns
15ns
t
)
OEA
)
Cycle Time
the
110ns
(Min.)
(Product : MD51V65400E-xxJA)
(Product : MD51V65400E-xxTA)
xx indicates speed rank.
90ns
device
Operating
504mW
432mW
in
(Max.)
Power Dissipation
FEDD51V65400E-03
Issue Date: Jul. 19, 2005
a
quadruple-layer
Standby
1.8mW
(Max.)
1/15

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MD51V65400E Summary of contents

Page 1

... The MSD51V65400E is a 16,777,216-word × 4-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS technology. The MD51V65400E achieves high integration, high-speed operation, and low-power consumption because polysilicon/double-layer metal CMOS process. The MD51V65400E is available in a 32-pin plastic SOJ or 32-pin plastic TSOP. FEATURES 16,777,216-word × 4-bit configuration · ...

Page 2

... Plastic TSOP Function Address Input Row Address Strobe Column Address Strobe Data Input/Data Output Output Enable Write Enable Power Supply (3.3V) Ground (0V) No Connection pin, and the same GND voltage level must CC FEDD51V65400E-03 MD51V65400E DQ4 30 DQ3 ...

Page 3

... Ta = 25° MHz) Symbol Min. C — IN1 C — IN2 C — I/O FEDD51V65400E-03 MD51V65400E Value Unit –0 0 –0 °C –55 to 150 ° ...

Page 4

... IH  0.5 − 0.2V  , 140   140 , IL  90 for output open condition FEDD51V65400E-03 MD51V65400E = 3.3V ± 0.3V 70° MD51V65400 E-60 Unit Note Min. Max. 2 0.4 V − 10 µA 10 − 10 µA 10  120 mA 1,2   ...

Page 5

... 10,000 CAS  CSH  CRP  30 RHCP RCD 12 25 RAD  ASR FEDD51V65400E-03 MD51V65400E MD51V65400 E-60 Unit Note Min. Max.  110 ns  155 ns      30 ...

Page 6

... RWD  CPWD  RPC  CSR  CHR  WRP  WRH FEDD51V65400E-03 MD51V65400E MD51V65400 E-60 Unit Note Min. Max.         ...

Page 7

... They are included in the data CPWD ≥ t (Min.), then the cycle is an early write cycle and WCS WCS ≥ t ≥ t (Min.) and t AWD AWD CPWD CPWD FEDD51V65400E-03 MD51V65400E T (Max.) limit, RCD (Max.) limit, RAD ≥ t CWD CWD (Min.), then the cycle is a read modify 7/15 ) ...

Page 8

... RC t RAS t CSH t t RCD RSH t CAS t RAL t t ASC CAH Column t CWL t t WCS WCH RWL Valid Data-in FEDD51V65400E-03 MD51V65400E CRP t RRH t RCH t OFF t OEZ “H” or “L” CRP Open “H” or “L” 8/15 ...

Page 9

... V I/OL t RWC t RAS t CSH t t RCD RSH t CAS t ASC t CAH Colum t t RCS CWD t RWD t AWD OEA t OED t CAC t RAC t OEZ t CLZ Valid Data-out FEDD51V65400E-03 MD51V65400E CRP t CWL t RWL OEH Valid Data-in “H” or “L” 9/15 ...

Page 10

... Column Column t t CWL CWL t t WCH WCH t WCS Valid * Valid * Data-in Data-in Note “H” or “L” FEDD51V65400E-03 MD51V65400E RHCP RSH t CRP t CAS t RAL t t ASC CAH Column RCH RCS RCH ...

Page 11

... OEA t OED t OED t OEZ t OEZ t CAC Out In Out In t CLZ Note Valid Data-in, Out = Valid Data-out RAS RAH Open Note: WE “H” or “L” FEDD51V65400E-03 MD51V65400E t RSH CAS t CAH t ASC t RAL Column CWL t CPWD t RWL t CWD ...

Page 12

... RCD RSH ASC CAH Column t t CAC RRH t RAL ROH WRP t OEA t RAC t CLZ Valid Data-out FEDD51V65400E-03 MD51V65400E RPC t WRP “H” or “L” RAS CHR t t WRH OFF t OEZ “H” or “L” 12/15 ...

Page 13

... Row WCS RAS t t RCD RSH RP t CAH t ASC Column t RAL t RWL WCH WRP Valid Data-in FEDD51V65400E-03 MD51V65400E RAS CHR t WRH “H” or “L” 13/15 ...

Page 14

... OKI Semiconductor REVISION HISTORY Document Date No. PEDD51V65400E-01 Jul. 1, 2002 FEDD51V65400E-01 Dec. 27, 2002 FEDD51V65400E-02 Oct. 30, 2003 FEDD51V65400E-03 Jul. 19, 2005 Page Previous Current Edition Edition – – Preliminary edition 1 – – Final edition – – Fixed errata 3 – Block Diagram deleted FEDD51V65400E-03 MD51V65400E Description 14/15 ...

Page 15

... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. FEDD51V65400E-03 MD51V65400E Copyright 2005 Oki Electric Industry Co., Ltd. 15/15 ...

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