ltc1760 Linear Technology Corporation, ltc1760 Datasheet - Page 32

• Manufacturer Part Number: ltc1760
• Description: Dual Smart Battery System Manager
• Manufacturer: Linear Technology Corporation

LTC1760
OPERATIO
V
the LTC1760 operating above the UVLO trip voltage long
enough to perform the short-circuit function when the
input voltages are greater than 8V. Increasing the capaci-
tor across V
recommended 6V minimum.
8.3 Emergency Turn-Off
All of the PowerPath switches can be forced off by setting
the DCDIV pin to a voltage between 8V and 10V. This will
have the same effect as a short-circuit event. DCDIV must
be less than 5V and V
threshold to re-enable the PowerPath switches. The
LTC1760 can recover from this condition without remov-
ing power. Contact Applications Engineering for more
information.
8.4 Power-Up Strategy
All three PowerPath switches are turned on after V
exceeds the UVLO threshold for more than 250ms. This
delay is to prevent oscillation from a turn-on transient near
the UVLO threshold.
9 The Voltage DAC Block
The voltage DAC (VDAC) is a delta-sigma modulator which
controls the effective value of an internal resistor,
R
voltage. Figure 7 is a simplified diagram of the VDAC
operation. The delta-sigma modulator and switch SWV
convert the VDAC value to a variable resistance equal to
(11/8)R
servo driven to the 0.8V reference voltage, V
32
PLUS
VSET
C
B2
C
B1
= 7.2k, used to program the maximum charger
and 2µF on V
VSET
V
SET
/(VDAC
CC
Figure 7. Voltage DAC Operation
CSN
to 4.7µF will allow operation down to the
SWV
U
CC
(VALUE)
PLUS
405.3k
R
7.2k
, including tolerances) should keep
VSET
R
VF
V
REF
must decrease below the UVLO
/2047). In regulation, V
MODULATOR
–
+
∆Σ
EA
11
REF
.
DAC
VALUE
(11 BITS)
SET
1760 F07
PLUS
TO
I
TH
is
Capacitors C
present at the V
voltage loop to help stability and transient response time
to voltage variations.
10 The Current DAC Block
The current DAC is a delta-sigma modulator which
controls the effective value of an internal resistor,
R
current. Figure 8 is a simplified diagram of the DAC opera-
tion. The delta-sigma modulator and switch convert the
IDAC value to a variable resistance equal to 1.25R
(IDAC
the 0.8V reference voltage, V
is matched against a current derived from the voltage
between pins CSP and CSN. This current is (V
3k.
Therefore programmed current is:
During wake-up current operation, the current DAC enters
a low current mode. The current DAC output is pulse-width
modulated with a high frequency clock having a duty cycle
value of 1/8. Therefore, the maximum output current pro-
vided by the charger is I
this low duty cycle signal on and off. The delta-sigma shift
registers are then clocked at a slower rate, about 40ms/bit,
so that the charger has time to settle to the I
C
SET
SET
I
= (102.3mV/R
CHG
= 18.77k, used to program the maximum charger
(VALUE)
I
= 0.8 V
SET
B1
/1023). In regulation, I
(FROM CA1 AMPLIFIER)
Figure 8. Current Dac Operation
REF
and C
SET
(V
SNS
R
18.77k
CSP
SET
3k/(R
3kΩ
pin as well as provide a zero in the
) • (IDAC
– V
B2
MAX
CSN
V
SNS
REF
are used to average the voltage
)
/8. The delta-sigma output gates
REF
R
MODULATOR
(VALUE)
SET
+
–
, and the current from R
∆Σ
) • (IDAC
SET
/1023)
is servo driven to
10
(VALUE)
MAX
CSP
/8 value.
– V
TO
I
DAC
VALUE
(10 BITS)
TH
/1023)
1760 F08
CSN
SET
1760f
SET
)/
/