ltc1760 Linear Technology Corporation, ltc1760 Datasheet - Page 41

• Manufacturer Part Number: ltc1760
• Description: Dual Smart Battery System Manager
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
4. Place the output current sense resistor right next to the
inductor output but oriented such that the IC’s current
sense feedback traces going to resistor are not long. The
feedback traces need to be routed together as a single pair
on the same layer at any given time with smallest trace
spacing possible. Locate any filter component on these
traces next to the IC and not at the sense resistor location.
5. Place output capacitors next to the sense resistor output
and ground.
6. Output capacitor ground connections need to feed into
same copper that connects to the input capacitor ground
before tying back into system ground.
General Rules
7. Connection of switching ground to system ground or
internal ground plane should be single point. If the system
has an internal system ground plane, a good way to do this
is to cluster vias into a single star point to make the
connection.
8. Route analog ground as a trace tied back to IC ground
(analog ground pin if present) before connecting to any
other ground. Avoid using the system ground plane. CAD
trick: make analog ground a separate ground net and use
a 0Ω resistor to tie analog ground to system ground.
V
IN
C
Figure 11. High-Speed Switching Path
IN
CIRCULATING
FREQUENCY
SWITCH NODE
PATH
HIGH
U
U
L1
W
D1
C
OUT
U
BAT
1760 F10
V
BAT
9. A good rule of thumb for via count for a given high
current path is to use 0.5A per via. Be consistent.
10. If possible, place all the parts listed above on the same
PCB layer.
11. Copper fills or pours are good for all power connec-
tions except as noted above in Rule 3. You can also use
copper planes on multiple layers in parallel too—this
helps with thermal management and lower trace induc-
tance improving EMI performance further.
12. For best current programming accuracy provide a
Kelvin connection from R
Figure 12 as an example.
It is important to keep the parasitic capacitance on the R
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
Important Safety Notes
Although every effort is made to meet and exceed all
required “SMBus Charger V1.1” safety features it is the
responsibility of the battery pack to protect itself from
excessive currents or voltages. The LTC1760 is not itself
a safety device. Consult your battery pack manufacturer
for more information.
Figure 12. Kelvin Sensing of Charging Current
DIRECTION OF CHARGING CURRENT
CSP
R
SENSE
SNS
CSN
to CSP and BAT. See
LTC1760
1760 F11
41
1760f
T
,