st52f510 STMicroelectronics, st52f510 Datasheet - Page 40

• Manufacturer Part Number: st52f510
• Description: 8-bit Intelligent Controller Unit Icu Two Timer/pwms, Adc, I2c, Spi, Sci
• Manufacturer: STMicroelectronics

ST52F510/F513/F514
5 INTERRUPTS
The Control Unit (CU) responds to peripheral
events and external events through its interrupt
channels.
When such events occur, if the related interrupt is
not masked and doesn’t have a priority order, the
current program execution can be suspended to
allow the CU to execute a specific response
routine.
Each interrupt is associated with an interrupt
vector that contains the memory address of the
related interrupt service routine. Each vector is
located in the Program/Data Memory space at a
fixed address (see Figure 3.2 Program/Data
Memory Organization).
5.1 Interrupt Processing
If interrupts are pending at the end of an arithmetic
or logic instruction, the interrupt with the highest
priority is acknowledged. When the interrupt is
acknowledged the flags and the current PC are
saved in the stacks and the associated Interrupt
routine is executed. The start address of this
routine (Interrupt Vector) is located in three bytes
of the Program/Data Memory between address 3
and 32 (03h-020h). See Table 5.1 for the list of the
Interrupt Vector addresses.
The Interrupt routine is performed as a normal
code. At the end of each instruction, the CU checks
if a higher priority interrupt has sent an interrupt
request. An Interrupt request with a higher priority
stops lower priority Interrupts. The Program
Counter and the flags are stored in their own
stacks.
With the instruction RETI (Return from Interrupt)
the flags and the Program Counter (PC) are
restored from the top of the stacks. These stacks
have already been described in Paragraph 3.4.
An Interrupt request cannot stop fuzzy rule
processing, but only after the end of a fuzzy rule or
at the end of a logic or arithmetic instruction,
unless a Global Interrupt Disable instruction has
been executed before (see below).
Remark: A fuzzy routine can be interrupted only in
the Main program. When a Fuzzy function is
running inside another interrupt routine an interrupt
request can cause side effects in the Control Unit.
For this reason, in order to use a Fuzzy function
inside an interrupt routine, the user MUST include
the Fuzzy function between an UDGI (MDGI)
instruction and an UEGI (MEGI) instruction (see
the following paragraphs), in order to disable the
interrupt request during the execution of the fuzzy
function.
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Figure 5.1 Interrupt Flow
5.2 Global Interrupt Request Enabling
When an Interrupt occurs, it generates a Global
Interrupt Pending (GIP). After a GIP a Global
Interrupt Request (GIR) will be generated and
Interrupt Service Routine associated with the
interrupt with higher priority will start.
In order to avoid possible conflicts between the
interrupt masking set in the main program, or
inside high level language compiler macros, the
GIP is put in AND through the User Global Interrupt
Mask or the Macro Global Interrupt Mask (see
Figure 5.2).
The UEGI/UDGI instruction switches the User
Global Interrupt Mask enabling/disabling the GIR
for the main program.
MEGI/MDGI instructions switch the Macro Global
Interrupt Mask on/off in order to ensure that the
macro will not be interrupted.
Figure 5.2 Global Interrupt Request
Global Interrupt
Pending
User Global
Interrupt Mask
Macro Global
INTERRUPT
PROGRAM
NORMAL
FLOW
Global Interrupt
Request
INSTRUCTION
INTERRUPT
SERVICE
ROUTINE
RETI