ltc4007eufd-1-trpbf Linear Technology Corporation, ltc4007eufd-1-trpbf Datasheet - Page 20

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ltc4007eufd-1-trpbf

Manufacturer Part Number
ltc4007eufd-1-trpbf
Description
4a, High Efficiency, Standalone Li-ion Battery Charger
Manufacturer
Linear Technology Corporation
Datasheet
LTC4007
APPLICATIO S I FOR ATIO
General Rules
7. Connection of switching ground to system ground or
8. Route analog ground as a trace tied back to IC ground
9. A good rule of thumb for via count for a given high
20
internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.
(analog ground pin if present) before connecting to
any other ground. Avoid using the system ground
plane. CAD trick: make analog ground a separate
ground net and use a 0Ω resistor to tie analog ground
to system ground.
current path is to use 0.5A per via. Be consistent.
U
U
W
U
10. If possible, place all the parts listed above on the same
11. Copper fills or pours are good for all power connec-
12. For best current programming accuracy provide a
It is important to keep the parasitic capacitance on the R
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
PCB layer.
tions except as noted above in Rule 3. You can also use
copper planes on multiple layers in parallel too—this
helps with thermal management and lower trace in-
ductance improving EMI performance further.
Kelvin connection from R
Figure 12 as an example.
SENSE
to CSP and BAT. See
4007fa
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