p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 204

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 8 I/O Ports
8.4.1
P4DDR specifies input or output for the pins of port 4 on a bit-by-bit basis.
Note:
Rev. 1.00 Sep. 21, 2006 Page 166 of 658
REJ09B0310-0100
Bit
7
6
5
4
3
2
1
0
*
Bit Name
P47DDR
P46DDR
P45DDR
P44DDR
P43DDR
P42DDR
P41DDR
P40DDR
Port 4 Data Direction Register (P4DDR)
The initial value of P46DDR is 1 (mode 1) or 0 (modes 2 and 3).
Initial
Value
0
1/0*
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
Description
P4DDR is initialized to H'40 (mode 1) or H'00 (modes 2
and 3).
Modes 1, 2, and 3 (EXPE = 1):
Pin P47 functions as a bus control input (WAIT), the IIC_0
I/O pin (SDA0), or an I/O port, according to the wait mode
setting. When P97 functions as an I/O port, it becomes an
output port when P97DDR is set to 1, and an input port
when P97DDR is cleared to 0.
Pin P46 functions as the φ output pin when P46DDR is set
to 1, and as the subclock input (EXCL) or an input port
when P96DDR is cleared to 0.
Pins P45 to P43 automatically become bus control outputs
(AS/IOS, WR, RD), regardless of the input/output direction
indicated by P45DDR to P43DDR.
Pins P42 to P40 become output ports when P42DDR to
P40DDR are set to 1, and input ports when P42DDR to
P40DDR are cleared to 0.
Modes 2 and 3 (EXPE = 0):
When the corresponding P4DDR bits are set to 1, pin P46
functions as the φ output pin and pins P47 and P45 to P40
become output ports. When P4DDR bits are cleared to 0,
the corresponding pins become input ports.

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