rm5231 pmc-sierra, rm5231 Datasheet - Page 14

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rm5231

Manufacturer Part Number
rm5231
Description
Rm5231 Microprocessor With 32-bit System Bus Released
Manufacturer
pmc-sierra
Datasheet

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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002165, Issue 1
Floating-point operations includes:
Table 2 gives the latencies of the floating-point instructions in internal processor cycles.
Table 2 Floating-Point Instruction Cycles
Operation
fadd
fsub
fmult
fmadd
fmsub
fdiv
fsqrt
frecip
frsqrt
fcvt.s.d
fcvt.s.w
fcvt.s.l
fcvt.d.s
fcvt.d.w
fcvt.d.l
fcvt.w.s
fcvt.w.d
fcvt.l.s
fcvt.l.d
fcmp
fmov
fmovc
fabs
fneg
Note:
add
subtract
multiply
divide
square root
reciprocal
reciprocal square root
conditional moves
conversion between fixed-point and floating-point format
conversion between floating-point formats, and floating-point compare.
Numbers are represented as single/double precision format.
Latency
4
4
4/5
4/5
4/5
21/36
21/36
21/36
38/68
4
6
6
4
4
4
4
4
4
4
1
1
1
1
1
RM5231™ Microprocessor with 32-bit System Bus Data Sheet
Repeat Rate
1
1
1/2
1/2
1/2
19/34
19/34
19/34
36/66
1
3
3
1
1
1
1
1
1
1
1
1
1
1
1
Released
14

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