sam4s8c ATMEL Corporation, sam4s8c Datasheet - Page 20

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sam4s8c

Manufacturer Part Number
sam4s8c
Description
At91sam Arm-based Flash Mcu
Manufacturer
ATMEL Corporation
Datasheet
5.5.2
5.5.3
20
Wait Mode
Sleep Mode
The purpose of the wait mode is to achieve very low power consumption while maintaining the
whole device in a powered state for a startup time of less than 10 µs. Current Consumption in
Wait mode is typically 15 µA (total current consumption) if the internal voltage regulator is used.
In this mode, the clocks of the core, peripherals and memories are stopped. However, the core,
peripherals and memories power supplies are still powered. From this mode, a fast start up is
available.
This mode is entered via Wait for Event (WFE) instructions with LPM = 1 (Low Power Mode bit in
PMC_FSMR) and with FLPM = 00 or FLPM=01 (Flash Low Power Mode bits in PMC_FSMR).
The Cortex-M4 is able to handle external events or internal events in order to wake-up the core
(WFE). This is done by configuring the external lines WUP0-15 as fast startup wake-up pins
(refer to
wake up the CPU (exit from WFE).
Entering Wait Mode:
Note:
Depending on Flash Low Power Mode (FLPM) value, the Flash will enter in three different
modes:
Following the Flash mode selection, the consumption in wait mode will decrease. In Deep Power
Down mode the recovery time of the Flash in Standby mode will be less than the power up
delay.
The purpose of sleep mode is to optimize power consumption of the device versus response
time. In this mode, only the core clock is stopped. The peripheral clocks can be enabled. The
current consumption in this mode is application dependent.
This mode is entered via Wait for Interrupt (WFI) or Wait for Event (WFE) instructions with
LPM = 0 in PMC_FSMR.
The processor can be awakened from an interrupt if WFI instruction of the Cortex-M4 is used, or
from an event if the WFE instruction is used to enter this mode.
• Supply Monitor alarm
• RTC alarm
• RTT alarm
• Select the 4/8/12 MHz fast RC oscillator as Main Clock
• Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR)
• Set the FLPM bitfield in the PMC Fast Startup Mode Register (PMC_FSMR)
• Execute the Wait-For-Event (WFE) instruction of the processor
• FLPM[00] in Standby mode
• FLPM[01] in Deep Power Down mode
• FLPM[10] in mode Idle.
Internal Main clock resynchronization cycles are necessary between the writing of MOSCRCEN
bit and the effective entry in Wait mode. Depending on the user application, waiting for
MOSCRCEN bit to be cleared is recommended to ensure that the core will not execute undesired
instructions.
Section 5.7 “Fast
Startup”). RTC or RTT Alarm and USB wake-up events can be used to
11100AS–ATARM–27-Oct-11

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