ics86953-147 Integrated Device Technology, ics86953-147 Datasheet
ics86953-147
Related parts for ics86953-147
ics86953-147 Summary of contents
Page 1
... High Performance Clock Solutions from ICS. The PCLK, nPCLK pair can accept most stan- dard differential input levels. With output frequencies up to 175MHz, the ICS86953I-147 is targeted for high performance clock ap- plications. Along with a fully integrated PLL, the ICS86953I-147 contains frequency configurable outputs and an external feed- back input for regenerating clocks with “ ...
Page 2
... www.icst.com/products/hiperclocks.html 2 ICS86953I-147 KEW D ERO ELAY ...
Page 3
... www.icst.com/products/hiperclocks.html 3 ICS86953I-147 KEW D ERO ELAY = -40°C 85° ...
Page 4
... www.icst.com/products/hiperclocks.html 4 ICS86953I-147 KEW D ERO ELAY = -40°C 85° ...
Page 5
... F Q0:Q7, QFB P ROPAGATION nPCLK PCLK FB_CLK t jit(Ø (Ø) — t (Ø) (where t (Ø) is any random sample, and t (Ø) of the sampled cycles measured on controlled edges ERIOD HASE ITTER www.icst.com/products/hiperclocks.html 5 ICS86953I-147 KEW D ERO ELAY I NFORMATION V Cross Points NPUT EVEL V DDO ...
Page 6
... T OWER UPPLY ILTERING ECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS86953I-147 provides sepa- rate power supplies to isolate any high switching noise from the outputs to the internal PLL. V and V DDA DDO connected to the power supply plane through vias, and bypass capacitors should be used for each pin ...
Page 7
... H N NPUT RIVEN IGURE 3.3V 3.3V R4 125 LVDS PCLK nPCLK HiPerClockS Input R2 84 PCLK 3D NPUT RIVEN IGURE RIVER www.icst.com/products/hiperclocks.html 7 ICS86953I-147 KEW D ERO ELAY 2.5V 3.3V 2. 120 120 SSTL Ohm PCLK Ohm nPCLK R1 R2 120 120 PCLK/ PCLK I ...
Page 8
... Circuit Systems, Inc AYOUT UIDELINE The schematic of the ICS86953I-147 layout example is shown in Figure 4A. The ICS86953I-147 recommended PCB board layout for this example is shown in Figure 4B. This layout example is used as a general guideline. The layout in the actual system will VDD VCC Ohm ...
Page 9
... The series termination resistors should be located as close to the driver pins as possible. 50 Ohm Trace Ohm Trace 4B. PCB OARD AYOUT OR www.icst.com/products/hiperclocks.html 9 ICS86953I-147 KEW D ERO ELAY GND VDD VIA Other signals C5 C4 ICS86953I-147 REV. B APRIL 23, 2004 , UFFER ...
Page 10
... Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR OUNT The transistor count for ICS86953I-147 is: 1758 86953BYI-147 D - -LVCMOS / LVTTL Z IFFERENTIAL TO ...
Page 11
... ° www.icst.com/products/hiperclocks.html 11 ICS86953I-147 KEW D ERO ELAY ...
Page 12
... www.icst.com/products/hiperclocks.html 12 ICS86953I-147 KEW D ERO ELAY ° ...
Page 13
... www.icst.com/products/hiperclocks.html 13 ICS86953I-147 KEW D ERO ELAY ...