ics650-44 Integrated Device Technology, ics650-44 Datasheet - Page 4

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ics650-44

Manufacturer Part Number
ics650-44
Description
Spread Spectrum Clock Synthesizer
Manufacturer
Integrated Device Technology
Datasheet
1) The 0.01µF decoupling capacitors should be mounted on
the component side of the board as close to the VDD pin as
possible. No vias should be used between the decoupling
capacitors and VDD pins. The PCB trace to VDD pins
should be kept as short as possible, as should the PCB
trace to the ground via.
2) The external crystal should be mounted just next to the
device with short traces. The X1 and X2 traces should not
be routed next to each other with minimum spaces, instead
they should be separated and away from other traces.
Absolute Maximum Ratings
Recommended Operation Conditions
IDT™ / ICS™ SPREAD SPECTRUM CLOCK SYNTHESIZER
ICS650-44
SPREAD SPECTRUM CLOCK SYNTHESIZER
Stresses above the ratings listed below can cause permanent damage to the ICS650-44. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature (max. of 10 seconds)
Parameter
Ambient Operating Temperature
Power Supply Voltage (VDD, with respect to GND)
Power Supply Voltage (VDDO)
Power Supply Ramp Time, Figure 4
Item
4
3) To minimize EMI, the 33 series termination resistor
should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers. Other signal traces should be routed away from the
ICS650-44. This includes signal traces just underneath the
device, or on layers adjacent to the ground plane layer used
by the device.
+3.135
+2.375
Min.
-40
5 V
-0.5 V to VDD+0.5 V
-40 to +85 C
-65 to +150 C
125 C
260 C
Typ.
+3.3
+2.5
Rating
+3.465
+2.625
Max.
+85
4
CLOCK SYNTHESIZER
ICS650-44
Units
ms
V
V
C
REV D 102709

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