mpc93h51 Integrated Device Technology, mpc93h51 Datasheet - Page 7

• Manufacturer Part Number: mpc93h51
• Description: Low Voltage Pll Clock Driver
• Manufacturer: Integrated Device Technology

IDT™ Low Voltage PLL Clock Driver
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC93H51
Low Voltage PLL Clock Driver
Advanced Clock Drivers Device Data
Freescale Semiconductor
Calculation of Part-to-Part Skew
where critical clock signal timing can be maintained across
several devices. If the reference clock inputs (TCLK or PCLK)
of two or more MPC93H51 are connected together, the
maximum overall timing uncertainty from the common TCLK
input to any output is:
components: static phase offset, output skew, feedback
board trace delay and I/O (phase) jitter:
is specified. I/O jitter numbers for other confidence factors
(CF) can be derived from
Table 8. Confidence Factor CF
layout and can be used to fine-tune the effective delay
through each device. In the following example calculation, an
I/O jitter confidence factor of 99.7% (± 3σ) is assumed,
resulting in a worst case timing uncertainty from input to any
output of –251 ps to 351 ps relative to TCLK (V
f
t
t
shown in the AC characteristic table for V
RMS). I/O jitter is frequency dependant with a maximum at
VCO
SK(PP)
SK(PP)
± 1σ
± 2σ
± 3σ
± 4σ
± 5σ
± 6σ
Figure 4. MPC93H51 Maximum Device-to-Device Skew
CF
The MPC93H51 zero delay buffer supports applications
This maximum timing uncertainty consists of 4
Due to the statistical nature of I/O jitter, a RMS value (1 σ)
The feedback trace delay is determined by the board
Above equation uses the maximum I/O jitter number
Any Q
Any Q
TCLK
= 400 MHz):
t
QFB
QFB
SK(PP)
Max. skew
= [–50ps...150ps] + [–150ps...150ps] +
= [–251ps...351ps] + t
Common
Device 1
Device 1
Device 2
Device2
Probability of Clock Edge within the Distribution
[(17ps @ –3)...(17ps @ 3)] + t
= t
(∅)
+ t
SK(O)
t
JIT(∅)
Table
—t
+ t
+t
0.68268948
0.95449988
0.99730007
0.99993663
0.99999943
0.99999999
(∅)
SK(O)
PD, LINE(FB)
PD, LINE(FB)
8.
+t
(∅)
t
SK(PP)
t
JIT(∅)
PD, LINE(FB)
CC
+ t
+t
JIT(∅)
t
PD,LINE(FB)
= 3.3 V (17 ps
SK(O)
CC
= 3.3 V and
• CF
7
the lowest VCO frequency (200 MHz for the MPC93H51).
Applications using a higher VCO frequency exhibit less I/O
jitter than the AC characteristic limit. The I/O jitter
characteristics in
I/O jitter number at the specific VCO frequency, resulting in
tighter timing limits in zero-delay mode and for part-to-part
skew t
Power Supply Filtering
analog circuitry is naturally susceptible to random noise,
especially if this noise is seen on the power supply pins.
Noise on the V
characteristics, for instance I/O jitter. The MPC93H51
provides separate power supplies for the output buffers (V
and the phase-locked loop (V
of this design technique is to isolate the high switching noise
digital outputs from the relatively sensitive internal analog
phase-locked loop. In a digital system environment where it
is more difficult to minimize noise on the power supplies, a
second level of isolation may be required. The simple but
effective form of isolation is a power supply filter on the V
pin for the MPC93H51.
The MPC93H51 frequency and phase stability is most
susceptible to noise with spectral content in the 100 kHz to 20
MHz range; therefore, the filter should be designed to target
this range. The key parameter that needs to be met in the
final filter design is the DC voltage drop across the series filter
resistor R
sourced through the V
maximum), assuming that a minimum of 3.0 V must be
maintained on the V
in
voltage drop criteria.
Figure 6
The MPC93H51 is a mixed analog/digital product. Its
Figure 6
30
25
20
15
10
5
0
SK(PP)
200
F
. From the data sheet the I
must have a resistance of 5–15 Ω to meet the
Figure 5. Maximum I/O Jitter (RSM)
illustrates a typical power supply filter scheme.
.
versus Frequency for V
225
Max. I/O Jitter versus Frequency
CCA
Figure 5
250
(PLL) power supply impacts the device
CCA
CCA
pin. The resistor R
275
can be used to derive a smaller
pin) is typically 6 mA (12 mA
VCO frequency [MHz]
CCA
300
) of the device.The purpose
CCA
325
CC
= 3.3 V
current (the current
350
F
shown
MPC93H51
375
NETCOM
400
CCA
CC
MPC93H51
7
)