mpc9850 Integrated Device Technology, mpc9850 Datasheet - Page 8

• Manufacturer Part Number: mpc9850
• Description: Xtal-input, Lvcmos Input, 8 Lvcmos Output Clock Generator
• Manufacturer: Integrated Device Technology

IDT™ Clock Generator for PowerQUICC III
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC9850
Clock Generator for PowerQUICC III
8
Table 12. MPC9850 Pin Diagram (Top View)
Table 13. MPC9850 Pin List
MPC9850
1. RSVD pins must be left open.
CLKA[1]
CLKA[3]
CLKA[5]
CLKA[0]
CLKA[2]
CLKA[4]
A
B
C
D
E
G
H
K
F
J
Signal
V
V
V
V
V
V
V
V
V
QA1
QA2
QA0
QA3
V
DDOA
DDOA
DDOA
DDOA
DDOA
DDOA
DDOA
DDOA
DDOA
DD
REF_CLK_SEL
REF_SEL
XTAL_IN
V
V
V
V
RSVD
PCLK
V
DDOA
DDOA
DDOB
DDOB
MAPBGA
DDA
1
100 Pin
A10
B10
A1
A2
A3
A4
A5
A6
A7
A8
A9
B1
B2
B3
B4
B5
B6
B7
B8
B9
REF_33MHz
XTAL_OUT
REF_OUT
RSVD
RSVD
Signal
V
V
V
V
RSVD
V
V
PCLK
GND
GND
GND
GND
QC0
V
QC0
V
V
V
V
V
V
V
V
V
CLK
DDOA
DDOA
DDOB
DDOB
DDA
DDA
DDA
DD
DD
DD
DD
DD
DD
DD
DD
DD
2
(1)
(1)
MAPBGA
100 Pin
CLKA[1]
CLKA[0]
CLKB[0]
CLKB[1]
C10
D10
V
C1
C2
C3
C4
C5
C6
C7
C8
C9
D1
D2
D3
D4
D5
D6
D7
D8
D9
V
V
V
V
V
3
DD
DD
DD
DD
DD
DD
CLKA[3]
CLKA[2]
CLKB[2]
CLKB[3]
REF_SEL
GND
GND
GND
GND
V
V
Signal
V
PCLK
PCLK
GND
GND
GND
GND
GND
GND
GND
GND
GND
QC1
QC1
CLK
4
V
V
V
V
DD
DD
DDOC
DD
DD
DD
DD
CLKA[5]
CLKA[4]
CLKB[4]
CLKB[5]
GND
GND
GND
GND
V
V
MAPBGA
5
DD
DD
100 Pin
8
E10
F10
E1
E2
E3
E4
E5
E7
E8
E9
E6
F1
F2
F3
F4
F5
F6
F7
F8
F9
GND
GND
GND
GND
QA0
QB0
V
V
V
V
6
DD
DD
DD
DD
REF_CLK_SEL
PLL_BYPASS
REF_33MHz
XTAL_OUT
XTAL_IN
RIO_C[1]
RIO_C[0]
Signal
GND
GND
GND
GND
V
V
V
V
V
V
V
V
MR
V
V
DD
DD
DD
DD
DD
DD
DD
DD
GND
GND
GND
GND
QA1
QB1
V
V
DDOA
DDOB
7
DD
DD
MAPBGA
QA2
QA3
QB3
QB2
V
V
V
V
V
V
100 Pin
8
DD
DD
DD
DD
DD
DD
Advanced Clock Drivers Devices
G10
H10
G1
G2
G3
G4
G5
G6
G7
G8
G9
H1
H2
H3
H4
H5
H6
H7
H8
H9
PLL_BYPASS
Freescale Semiconductor
RIO_C[1]
V
V
V
V
V
CLKB[0]
CLKB[2]
CLKB[4]
CLKB[1]
CLKB[3]
CLKB[5]
QC0
QC1
V
DDOA
DDOA
DDOC
DDOB
DDOB
V
V
V
V
V
V
V
V
Signal
V
9
DD
QB0
QB3
QB1
QB2
V
DDOB
DDOB
DDOB
DDOB
DDOB
DDOB
DDOB
DDOB
DDOB
DD
REF_OUT
MAPBGA
RIO_C[0]
100 Pin
V
V
V
V
GND
QC0
QC1
K10
DDOA
DDOA
MR
DDOB
DDOB
J10
K1
K2
K3
K4
K5
K6
K7
K8
K9
10
J1
J2
J3
J4
J5
J6
J7
J8
J9
NETCOM
MPC9850