74hct7403 NXP Semiconductors, 74hct7403 Datasheet - Page 16

• Manufacturer Part Number: 74hct7403
• Description: 4-bit X 64-word Fifo Register; 3-state
• Manufacturer: NXP Semiconductors

Philips Semiconductors
With FIFO empty; SO is held HIGH in anticipation
Notes to Fig.10
1. FIFO is initially empty, SO is held HIGH
2. SI pulse; loads data into FIFO and initiates ripple through process
3. DOR flag signals the arrival of valid data at the output stage
4. Output transition; data arrives at output stage after the specified propagation delay between the rising edge of the
5. DOR goes LOW; data shift-out is complete, FIFO is empty again
6. SO set LOW; necessary to complete shift-out process. DOR remains LOW, because FIFO is empty.
September 1993
handbook, full pagewidth
4-Bit x 64-word FIFO register; 3-state
(1) HC : V
Fig.10 Waveforms showing ripple through delay SI input to DOR output, DOR output pulse width and propagation
DOR pulse to the Q
HCT: V
delay from the DOR pulse to the Q
M
M
= 50%; V
= 1.3 V; V
I
= GND to V
I
= GND to 3 V.
n
SI INPUT
SO INPUT
Q OUTPUT
DOR OUTPUT
output
n
CC
.
1
V M
(1)
n
output.
2
V M
(1)
ripple through
16
delay
t PLH
3
V M
(1)
4
t W
t PHL
t PLH
5
MGA658
6
74HC/HCT7403
Product specification