74hct7403 NXP Semiconductors, 74hct7403 Datasheet - Page 26

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74hct7403

Manufacturer Part Number
74hct7403
Description
4-bit X 64-word Fifo Register; 3-state
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Notes to Fig.22
1. FIFO
2. Unload one word from FIFO
3. DIR
4. DOR
5. DOR
6. DIR
September 1993
handbook, full pagewidth
4-Bit x 64-word FIFO register; 3-state
data is shifted out of FIFO
bubble-up of empty location
B
A
A
A
A
and SO
goes HIGH; (bubble-up delay after SO
and SI
and SI
and FIFO
A
B
B
go HIGH; flag indicates valid data is again available at FIFO
pulse HIGH; (bubble-up delay after SO
go LOW; flag indicates the output stage of FIFO
B
initially full, SI
DOR B
Fig.22 FIFO to FIFO communication; output timing under full condition.
SO B
DIR B
DOR A SI B
DIR A
Q nA
D
SO A
nB
A
B
; SO pulse applied, results in DOR pulse
1
B
held HIGH in anticipation of shifting in new data as an empty location bubbles-up
V M
(1)
V M
(1)
A
LOW) an empty location is present at input stage of FIFO
2
bubble - up
delay
B
26
LOW) data is loaded into FIFO
V M
4
(1)
A
V M
3
is busy, shift-in to FIFO
(1)
bubble - up
A
delay
output stage, SI
5
V M
MGA667
B
(1)
6
as a result of the DIR pulse,
B
74HC/HCT7403
is complete
B
is held HIGH, awaiting
Product specification
A
.

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