mc145053p Lansdale Semiconductor, Inc., mc145053p Datasheet - Page 2

• Manufacturer Part Number: mc145053p
• Description: 10-bit A/d Converter With Serial Interface Cmos
• Manufacturer: Lansdale Semiconductor, Inc.

ML145053
Page 2 of 15
MAXIMUM RATINGS*
* Maximum Ratings are those values beyond which damage to the device may occur. Func-
OPERATION RANGES
NOTE: Analog input voltages greater than V ref convert to full scale. Input voltages less than V AG convert to zero. See V ref and V AG pin
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to V SS , Full Temperature and Voltage Ranges per Operation Ranges Table, unless otherwise indicated)
V in , V out
I DD , I SS
tional operation should be restricted to the Operation Ranges below..
Symbol
Symbol
Symbol
V DD
V AG
V DD
V AG
V OH
V out
V OL
V ref
T stg
V ref
I DD
I out
V IH
I OZ
V in
V AI
V IL
I ref
T L
T A
I Al
I in
I in
descriptions.
DC Supply Voltage (Referenced to V SS )
DC Reference Voltage
Analog Ground
DC Input Voltage, Any Analog or Digital
Input
DC Output Voltage
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, V DD and V SS Pins
Storage Temperature
Lead Temperature, 1 mm from Case for
10 Seconds
DC Supply Voltage, Referenced to V SS
DC Reference Voltage
Analog Ground
Analog Input Voltage (See Note)
Digital Input Voltage, Output Voltage
Ambient Operating Temperature
Minimum High-Level Input Voltage
Maximum Low-Level Input Voltage
Minimum High-Level Output Voltage
Minimum Low-Level Output Voltage
Maximum Input Leakage Current
Maximum Three-State Leakage Current (D out )
Maximum Power Supply Current
Maximum Static Analog Reference Current (V ref )
Maximum Analog Mux Input Leakage Current between all
deselected inputs and any selected input (AN0–AN4)
(D in , SCLK, CS)
(D in , SCLK, CS)
(D out , EOC)
(D out , EOC)
(D in , SCLK, CS)
(Applicable to Guaranteed Limits)
Parameter
Parameter
Parameter
V AG to V DD + 0.1
V SS – 0.1 to V ref
www.lansdale.com
– 0.5 to + 6.0
V SS – 0.5 to
V SS – 0.5 to
– 65 to 150
V DD + 0.5
V DD + 0.5
Value
± 20
± 25
± 50
260
I out = – 1.6 mA
I out = – 20 µA
I out = + 1.6 mA
I out = + 20 µA
V in = V SS or V DD
V out = V SS or V DD
V in = V SS or V DD , All Outputs Open
V ref = V DD , V AG = V SS
V Al = V SS to V DD
Unit
mA
mA
mA
C
C
V
V
V
V
V
Test Condition
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications
of any voltage higher than maximum rated
voltages to this high-impedance circuit. For
proper operation, V in and V out should be
constrained to the range V SS ≤ (V in or V out ) ≤
V DD .
appropriate logic voltage level (e.g., either
V SS or V DD ). Unused outputs must be left
open.
This device contains protection circuitry to
Unused inputs must always be tied to an
V AG + 4.0 to V DD + 0.1
V SS – 0.1 to V ref – 4.0
LANSDALE Semiconductor, Inc.
V SS to V DD
V AG to V ref
– 40 to 125
4.5 to 5.5
Value
Guaranteed
V DD – 0.1
Limit
± 2.5
± 10
100
2.0
0.8
2.4
0.4
0.1
2.5
± 1
Unit
Unit
mA
µA
µA
µA
µA
C
V
V
V
V
V
V
V
V
V
Issue A