max5230beeet Maxim Integrated Products, Inc., max5230beeet Datasheet - Page 14

• Manufacturer Part Number: max5230beeet
• Description: 3v/5v, 12-bit, Serial Voltage-output Dual Dacs With Internal Reference
• Manufacturer: Maxim Integrated Products, Inc.

Integral nonlinearity (Figure 6a) is the deviation of the val-
ues on an actual transfer function from a straight line.
This straight line can be either a best-straight-line fit
(closest approximation to the actual transfer curve) or a
line drawn between the endpoints of the transfer func-
tion, once offset and gain errors have been nullified. For
a DAC, the deviations are measured at every single step.
Differential nonlinearity (Figure 6b) is the difference
between an actual step height and the ideal value of
1LSB. If the magnitude of the DNL is less than 1LSB, the
DAC guarantees no missing codes and is monotonic.
3V/5V, 12-Bit, Serial Voltage-Output Dual DACs
with Internal Reference
14
Figure 6a. Integral Nonlinearity
Figure 6c. Offset Error
______________________________________________________________________________________
3
2
1
0
7
6
5
4
3
2
1
0
000
000
Applications Information
ACTUAL
OFFSET
POINT
001
IDEAL OFFSET
POINT
DIAGRAM
ACTUAL
010
Differential Nonlinearity (DNL)
001
DIGITAL INPUT CODE
DIGITAL INPUT CODE
AT STEP
001 (1/4LSB )
011
Integral Nonlinearity (INL)
OFFSET ERROR
(+1 1/4LSB)
100
010
AT STEP
011 (1/2LSB )
101
IDEAL DIAGRAM
110
Definitions
011
111
The offset error (Figure 6c) is the difference between
the ideal and the actual offset point. For a DAC, the off-
set point is the step value when the digital input is zero.
This error affects all codes by the same amount and
can usually be compensated for by trimming.
Gain error (Figure 6d) is the difference between the
ideal and the actual full-scale output voltage on the
transfer curve, after nullifying the offset error. This error
alters the slope of the transfer function and corre-
sponds to the same percentage error in each step.
The settling time is the amount of time required from the
start of a transition, until the DAC output settles to its new
output value within the converter’s specified accuracy.
Figure 6b. Differential Nonlinearity
Figure 6d. Gain Error
7
6
5
4
0
6
5
4
3
2
1
0
000
000
IDEAL DIAGRAM
100
001
GAIN ERROR
(-1 1/4LSB)
IDEAL FULL-SCALE OUTPUT
DIGITAL INPUT CODE
DIGITAL INPUT CODE
010
101
1LSB
011
DIFFERENTIAL
LINEARITY ERROR (+1/4LSB)
DIFFERENTIAL LINEARITY
ERROR (-1/4LSB)
100
110
FULL-SCALE
OUTPUT
ACTUAL
101
Settling Time
Offset Error
1LSB
Gain Error
111