max5873egktd Maxim Integrated Products, Inc., max5873egktd Datasheet

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max5873egktd

Manufacturer Part Number
max5873egktd
Description
Max5873 12-bit, 200msps, High-dynamic-performance, Dual Dac With Cmos Inputs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
The MAX5873 is an advanced 12-bit, 200Msps, dual
digital-to-analog converter (DAC). This DAC meets the
demanding performance requirements of signal synthesis
applications found in wireless base stations and other
communications applications. Operating from 3.3V and
1.8V supplies, this dual DAC offers exceptional dynamic
performance such as 78dBc spurious-free dynamic range
(SFDR) at f
200Msps, with a power dissipation of only 255mW.
The MAX5873 utilizes a current-steering architecture
that supports a 2mA to 20mA full-scale output current
range, and allows a 0.1V
voltage swing. The MAX5873 features an integrated
1.2V bandgap reference and control amplifier to ensure
high-accuracy and low-noise performance. A separate
reference input (REFIO) allows for the use of an exter-
nal reference source for optimum flexibility and
improved gain accuracy.
The digital and clock inputs of the MAX5873 accept
3.3V CMOS voltage levels. The MAX5873 features a
flexible input data bus that allows for dual-port input or
a single-interleaved data port. The MAX5873 is avail-
able in a 68-pin QFN package with an exposed paddle
(EP) and is specified for the extended temperature
range (-40°C to +85°C).
Refer to the MAX5874 and MAX5875 data sheets for
pin-compatible 14-bit and 16-bit versions of the
MAX5873, respectively. Refer to the MAX5876 for an
LVDS-compatible version of the MAX5873.
19-3446; Rev 3; 1/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX5873
MAX5874
MAX5875
MAX5876
MAX5877
MAX5878
PART
12-Bit, 200Msps, High-Dynamic-Performance,
Base Stations: Single-Carrier UMTS, CDMA, GSM
Communications: Fixed Broadband Wireless
Access, Point-to-Point Microwave
Direct Digital Synthesis (DDS)
Cable Modem Termination System (CMTS)
Automated Test Equipment (ATE)
Instrumentation
OUT
RESOLUTION
= 16MHz and supports update rates of
________________________________________________________________ Maxim Integrated Products
(BITS)
12
14
16
12
14
16
General Description
P-P
to 1V
RATE (Msps)
Selector Guide
UPDATE
P-P
200
200
200
250
250
250
Applications
differential output
INPUTS
LOGIC
CMOS
CMOS
CMOS
LVDS
LVDS
LVDS
Dual DAC with CMOS Inputs
♦ 200Msps Output Update Rate
♦ Noise Spectral Density = -152dBFS/Hz
♦ Excellent SFDR and IMD Performance
♦ ACLR = 74dB at f
♦ 2mA to 20mA Full-Scale Output Current
♦ CMOS-Compatible Digital and Clock Inputs
♦ On-Chip 1.2V Bandgap Reference
♦ Low 255mW Power Dissipation
♦ 68-Lead QFN-EP Package
♦ Evaluation Kit Available (MAX5873EVKIT)
*EP = Exposed pad.
+ Denotes lead-free package.
D = Dry pack.
MAX5873EGK-D
MAX5873EGK+D
TOP VIEW
DV
AV
FSADJ
at f
REFIO
DD3.3
DD3.3
GND
GND
GND
GND
N.C.
N.C.
N.C.
N.C.
A4
A3
A2
A1
A0
SFDR = 78dBc at f
SFDR = 73dBc at f
IMD = -85dBc at f
IMD = -74dBc at f
PART
OUT
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
68
18
= 16MHz
67
19
20
66
65
21
-40°C to +85°C
-40°C to +85°C
TEMP RANGE
64
22
OUT
63
23
Ordering Information
OUT
OUT
62
24
OUT
OUT
QFN
= 61MHz
61
25
MAX5873
= 10MHz
= 80MHz
Pin Configuration
60
26
= 16MHz (to Nyquist)
= 80MHz (to Nyquist)
27
59
28
58
PIN-
PACKAGE
29
68 QFN-EP*
68 QFN-EP*
57
30
56
31
55
32
54
Features
53
33
52
34
PKG
CODE
G6800-4
G6800-4
41
51
50
49
48
47
46
45
44
43
42
40
39
38
37
36
35
B5
B6
B7
B8
B9
B10
B11
SELIQ
GND
XOR
DORI
PD
TORB
CLKP
CLKN
GND
AV
CLK
1

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max5873egktd Summary of contents

Page 1

Rev 3; 1/07 12-Bit, 200Msps, High-Dynamic-Performance, General Description The MAX5873 is an advanced 12-bit, 200Msps, dual digital-to-analog converter (DAC). This DAC meets the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. ...

Page 2

High-Dynamic-Performance, Dual DAC with CMOS Inputs ABSOLUTE MAXIMUM RATINGS GND, DACREF ................. -0.3V to +2.16V DD1.8 DD1 GND, DACREF ....... -0.3V to +3.9V DD3.3 DD3.3 CLK REFIO, FSADJ ...

Page 3

High-Dynamic-Performance, ELECTRICAL CHARACTERISTICS (continued) ( 3.3V, AV DD3.3 DD3.3 CLK 50Ω double terminated, transformer-coupled output +25°C.) (Note 2) PARAMETER SYMBOL Spurious-Free Dynamic Range SFDR to Nyquist Spurious-Free Dynamic Range, SFDR 25MHz ...

Page 4

High-Dynamic-Performance, Dual DAC with CMOS Inputs ELECTRICAL CHARACTERISTICS (continued) ( 3.3V, AV DD3.3 DD3.3 CLK 50Ω double terminated, transformer-coupled output +25°C.) (Note 2) PARAMETER SYMBOL ANALOG OUTPUT TIMING (See Figure 4) ...

Page 5

High-Dynamic-Performance, ELECTRICAL CHARACTERISTICS (continued) ( 3.3V, AV DD3.3 DD3.3 CLK 50Ω double terminated, transformer-coupled output +25°C.) (Note 2) PARAMETER SYMBOL DV Digital Supply Voltage Range DV Clock Supply Voltage Range AV ...

Page 6

High-Dynamic-Performance, Dual DAC with CMOS Inputs ( 3.3V, AV DD3.3 DD3.3 CLK I = 20mA +25°C, unless otherwise noted.) OUTFS A SINGLE-TONE SFDR vs. OUTPUT FREQUENCY (f = 200Msps) CLK 100 ...

Page 7

High-Dynamic-Performance, ( 3.3V, AV DD3.3 DD3.3 CLK I = 20mA +25°C, unless otherwise noted.) OUTFS A POWER DISSIPATION vs. CLOCK FREQUENCY (f OUT 280 A = 0dBFS OUT 260 240 220 ...

Page 8

High-Dynamic-Performance, Dual DAC with CMOS Inputs PIN NAME A4, A3, A2, Data Bits A4–A0. In dual-port mode, data is directed to the Q-DAC. In single-port mode, data bits 1–5 A1, A0 are not used. Connect bits A4–A0 to ...

Page 9

High-Dynamic-Performance, PIN NAME DAC Exclusive-OR Select Input. Set XOR low to allow the data stream to pass unchanged to the 42 XOR DAC input. Set XOR high to invert the input data into the DAC. If unused, connect ...

Page 10

High-Dynamic-Performance, Dual DAC with CMOS Inputs DV GND DD3.3 TORB DORI SELIQ CMOS DATA11– LATCH RECEIVER DATA0 XOR AV CLK CLKP CLKN GND Figure 1. MAX5873 High-Performance, 12-Bit, Dual Current-Steering DAC (OUTIP, OUTIN, OUTQP, OUTQN) Each MAX5873 DAC ...

Page 11

High-Dynamic-Performance, 1.2V REFERENCE 10kΩ REFIO 1µF FSADJ I REF R SET DACREF REF REFIO SET Figure 2. Reference Architecture, Internal Reference Configuration Table 2. DAC Output Code Table DIGITAL INPUT CODE TWO’S OFFSET ...

Page 12

High-Dynamic-Performance, Dual DAC with CMOS Inputs DATA11–DATA0, XOR CLK DAC OUTPUT CLK I0 DATA IN SELIQ OUT ...

Page 13

High-Dynamic-Performance, WIDEBAND RF TRANSFORMER PERFORMS SINGLE-ENDED-TO- DIFFERENTIAL CONVERSION 1:1 SINGLE-ENDED CLOCK SOURCE GND Figure 5. Differential Clock-Signal Generation Differential Coupling Using a Wideband RF Use a pair of transformers (Figure differential amplifier configuration to convert ...

Page 14

High-Dynamic-Performance, Dual DAC with CMOS Inputs OUTIP/OUTQP DATA11–DATA0 MAX5873 12 OUTIN/OUTQN GND Figure 7. Differential Output Configuration The MAX5873 requires five separate power-supply inputs for analog (AV and AV ), digital (DV DD1.8 DD3 and clock ...

Page 15

High-Dynamic-Performance, A gain error is the difference between the ideal and the actual full-scale output voltage on the transfer curve, after nullifying the offset error. This error alters the slope of the transfer function and corresponds to the ...

Page 16

... Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products Package Information PACKAGE OUTLINE, 68L QFN, 10x10x0 21-0122 C 2 PACKAGE OUTLINE, 68L QFN, 10x10x0 21-0122 registered trademark of Maxim Integrated Products, Inc. ...

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