max5873egktd Maxim Integrated Products, Inc., max5873egktd Datasheet - Page 14

• Manufacturer Part Number: max5873egktd
• Description: Max5873 12-bit, 200msps, High-dynamic-performance, Dual Dac With Cmos Inputs
• Manufacturer: Maxim Integrated Products, Inc.

12-Bit, 200Msps, High-Dynamic-Performance,
Dual DAC with CMOS Inputs
Figure 7. Differential Output Configuration
The MAX5873 requires five separate power-supply inputs
for analog (AV
DV
AV
capacitor as close to the device as possible with the
shortest possible connection to the ground plane (Figure
8). Minimize the analog and digital load capacitances for
optimized operation. Decouple all three power-supply
voltages at the point they enter the PCB with tantalum or
electrolytic capacitors. Ferrite beads with additional
decoupling capacitors forming a pi-network could also
improve performance.
The analog and digital power-supply inputs AV
AV
voltage range. The analog and digital power-supply
inputs AV
supply voltage range.
The MAX5873 is packaged in a 68-pin QFN-EP pack-
age, providing greater design flexibility, increased ther-
mal efficiency, and optimized DAC AC performance.
The EP enables the use of necessary grounding tech-
niques to ensure highest performance operation.
Thermal efficiency is not the key factor, since the
MAX5873 features low-power operation. The exposed
pad ensures a solid ground connection between the
DAC and the PCB’s ground layer.
The data converter die attaches to an EP lead frame with
the back of this frame exposed at the package bottom
surface, facing the PCB side of the package. This allows
for a solid attachment of the package to the PCB with
standard infrared reflow (IR) soldering techniques. A spe-
cially created land pattern on the PCB, matching the size
of the EP (6mm x 6mm), ensures the proper attachment
and grounding of the DAC. Refer to the MAX5873 EV kit
data sheet. Designing vias into the land area and imple-
14
DATA11–DATA0
DD
CLK
DD3.3
______________________________________________________________________________________
, DV
, and DV
12
), and clock (AV
DD
DD1.8
, and AV
DD1.8
DD3.3
and DV
MAX5873
GND
and AV
CLK
allow a 3.135V to 3.465V supply
DD1.8
CLK
input pin with a separate 0.1µF
DD3.3
) circuitry. Decouple each
OUTIP/OUTQP
OUTIN/OUTQN
allow a 1.71V to 1.89V
), digital (DV
25Ω
50Ω
25Ω
DD1.8
DD3.3
OUTP
OUTN
and
,
menting large ground planes in the PCB design allow
for the highest performance operation of the DAC. Use an
array of at least 4 x 4 vias (≤ 0.3mm diameter per via hole
and 1.2mm pitch between via holes) for this 68-pin QFN-
EP package. Connect the MAX5873 exposed paddle to
GND. Vias connect the land pattern to internal or external
copper planes. Use as many vias as possible to the
ground plane to minimize inductance.
Integral nonlinearity is the deviation of the values on an
actual transfer function from either a best straight-line fit
(closest approximation to the actual transfer curve) or a
line drawn between the end points of the transfer func-
tion, once offset and gain errors have been nullified.
For a DAC, the deviations are measured at every indi-
vidual step.
Differential nonlinearity is the difference between an
actual step height and the ideal value of 1 LSB. A DNL
error specification of less than 1 LSB guarantees a
monotonic transfer function.
The offset error is the difference between the ideal and
the actual offset current. For a DAC, the offset point is
the average value at the output for the two midscale
digital input codes with respect to the full scale of the
DAC. This error affects all codes by the same amount.
Figure 8. Recommended Power-Supply Decoupling and
Bypassing Circuitry
Static Performance Parameter Definitions
*BYPASS EACH POWER-SUPPLY PIN INDIVIDUALLY.
BYPASSING—DAC LEVEL
DATA11–DATA0
12
AV
DV
DD1.8
DD1.8
Differential Nonlinearity (DNL)
0.1µF
0.1µF
DV
AV
MAX5873
DD3.3
DD3.3
Integral Nonlinearity (INL)
0.1µF
0.1µF
AV
CLK
OUTIP/OUTQP
OUTIN/OUTQN
0.1µF
Offset Error