adcs-2021 Avago Technologies, adcs-2021 Datasheet
adcs-2021
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adcs-2021 Summary of contents
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... High sensitivity, low noise design ideal for capturing high-quality images in a variety of lighting conditions • Integrated analog-to-digital converters: VGA (ADCS-2021): 10 bit, programmable CIF (ADCS-1021): 8 bit, fixed • Parallel and serial output • Automated, dark response compensation • Automatic subtraction of column fixed pattern noise • ...
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... Master Clock The part requires a 50% duty cycle master clock. Maximum clock rates are 25 MHz for ADCS-2021 and 32 MHZ for ADCS-1021. Reset A hard reset is required before the sensor will function properly. Once the master clock is running, assert nRST_nSTBY for 40 clock cycles ...
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... Table 1. Register Set Declaration for Agilent ADCS-1021 and ADCS-2021 Image Sensors. Register Name Identifications Register Status Register Interrupt Mask Register Pad Control Register Pad Drive Control Register Interface Control Register Interface Timing Register Baud Fraction Register Baud Rate Register ADC Control Register ...
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Setting Exposure and Gain The exposure of an image is a function of the exposure and gain registers. Exposure sets the length of time each pixel inte- grates the light (shutter speed). Gain settings allow pixel values to be amplified. ...
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... D7 26 DATA READY 13 Reset 14 End of Row 9 End of Frame 18 TxD/RxD Serial Interface 17 Clock Host System ADCS-2021 (VGA) 7.4 x 7.4 µm 25 MHz (VGA (VGA 240 e-/sec (@ 22°C) 1.22 V 68,000 e- 17 µV/e- 1– bit resolution) 42% 0.5 µsec minimum, 0.5 µsec increments 3.3 V, -5%/+10% 3.6 V 3.6 V 150 mW operating, 150 µW standby 200 mW operating, 3.3 mW standby 1/3” ...
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... ADCS Sensor Top Level Block Diagram Compatible/ UART Timing Clock Controller ADCS-2021 32 Pin Package Diagram DATA7 21 AGND2 22 AVDD2 23 VDD3 24 GND3 25 DRDY 26 CLK 27 DATA6 Image Array VGA 640 x 480 CIF 352 x 288 ...
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... ADCS-2021 Pin Description Pkg Pins Signal Name 11 IMODE1 12 IMODE0 27 CLK 13 nRST_nSTBY 19, 20, 21, 28, 29, 30 Data 9, Data 8,… Data 1, Data 0 26 DRDY 18 SDATA_TxD 17 SCLK_RxD 9 nFRAME_nSYNC 14 nROW 10 nIRQ_nCC 5, 31, 24 VDD 6, 32, 25 GND 16 PVDD 8, 23 AVDD 7, 22, 15 AGND ADCS-1021 Pin Description Pkg Pins (Location) ...
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Packaging General Package Specs • 32-pin CLCC (8 per side) • Package dimensions, optical center shown in diagram below 1.15 ± 0.10 0.50 Die center Glass lid 1.26 ± 0.15 0.55 A-A CROSS SECTION 0.50 PLATED LEAD AREA 1.65 ± ...