adc08d1010diyb National Semiconductor Corporation, adc08d1010diyb Datasheet - Page 36
adc08d1010diyb
Manufacturer Part Number
adc08d1010diyb
Description
High Performance, Low Power, Dual 8-bit, 1 Gsps A/d Converter
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC08D1010DIYB.pdf
(38 pages)
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Driving the V
mentioned in Section 2.1, the reference voltage is intended to
be fixed to provide one of two different full-scale values (650
mV
the full scale value, but can be used to change the LVDS
common mode voltage from 0.8V to 1.2V by tying the V
to V
Driving the clock input with an excessively high level
signal. The ADC input clock level should not exceed the level
described in the Operating Ratings Table or the input offset
could change.
Inadequate input clock levels. As described in Section 2.3,
insufficient input clock levels can result in poor performance.
P-P
A.
and 870 mV
BG
pin to change the reference voltage. As
P-P
). Over driving this pin will not change
BG
pin
36
Excessive input clock levels could result in the introduction of
an input offset.
Using a clock source with excessive jitter, using an ex-
cessively long input clock signal trace, or having other
signals coupled to the input clock signal trace. This will
cause the sampling interval to vary, causing excessive output
noise and a reduction in SNR performance.
Failure to provide adequate heat removal. As described in
Section 2.6.2, it is important to provide adequate heat removal
to ensure device reliability. This can either be done with ad-
equate air flow or the use of a simple heat sink built into the
board. The backside pad should be grounded for best perfor-
mance.
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