adv7197 Analog Devices, Inc., adv7197 Datasheet - Page 5

• Manufacturer Part Number: adv7197
• Description: Multiformat Hdtv Encoder With Three 11-bit Dacs
• Manufacturer: Analog Devices, Inc.

3.3 V TIMING–SPECIFICATIONS
P
ANALOG OUTPUTS
CLOCK CONTROL AND PIXEL PORT
NOTES
1
2
3
Specifications subject to change without notice.
Guaranteed by characterization.
Output delay measured from the 50% point of the rising edge of CLOCK to the 50% point of DAC output full-scale transition.
Data: Cb/Cr (9:0), Cr (9:0), Y (9:0); Control: HSYNC/SYNC, VSYNC/TSYNC; DV
arameter
MPU PORT
SCLOCK Frequency
SCLOCK High Pulsewidth, t
SCLOCK Low Pulsewidth, t
Hold Time (Start Condition), t
Setup Time (Start Condition), t
Data Setup Time, t
SDATA, SCLOCK Rise Time, t
SDATA, SCLOCK Fall Time, t
Setup Time (Stop Condition), t
RESET Low Time
Analog Output Delay
Analog Output Skew
f
t
Clock High Time, t
Clock Low Time, t
Data Setup Time, t
Data Hold Time, t
Control Setup Time, t
Control Hold Time, t
Pipeline Delay
CLK
CLK
1
PIXEL INPUT
12
10
5
11
9
2
12
CLOCK
11
DATA
2
1
3
8
4
t
7
11
6
Cb0
Y0
t
9
t
12
3
t
10
Cr0
Y1
Min
10
0.6
1.3
0.6
0.6
100
0.6
100
5
5
2.0
4.5
7
4.0
(V
T
MIN
AA
= 3.15 V to 3.45 V, V
to T
Cb1
Y2
Typ
10
0.5
1.5
2.0
16
MAX
[0 C to 70 C] unless otherwise noted.)
Cr1
Max
400
300
300
74.25
81
...
REF
...
...
ns
Unit
kHz
µs
µs
µs
µs
ns
ns
ns
µs
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
Clock Cycles
= 1.235 V, R
Cbxxx
Yxxx
SET
= 2470
Crxxx
Yxxx
Conditions
After This Period the 1st Clock Is Generated
Relevant for Repeated Start Condition
HDTV Mode
Async Timing Mode
For 4:4:4 Pixel Input Format
, R
t
t
t
t
9 – CLOCK HIGH TIME
10 – CLOCK LOW TIME
11 – DATA SETUP TIME
12 – DATA HOLD TIME
LOAD
= 300
. All specifications
ADV7197