at83c24nds-tisum ATMEL Corporation, at83c24nds-tisum Datasheet - Page 29

• Manufacturer Part Number: at83c24nds-tisum
• Description: Smart Card Reader Interface With Power Management
• Manufacturer: ATMEL Corporation

Table 18. Host Interface (I/O, C4, C8, CLK, A2, A1, A0, CMDVCC, PRES/INT) (Continued)
Table 19. Host Interface (SCL, SDA, RESET)
Table 20. Smart Card Class A
4234F–SCR–10/05
Symbol
R
Symbol
EVCC
EVCC
PRES/INT
V
EI
CLK
CLK
V
V
V
V
V
HIST
Symbol
CI
OH
OL
OL
CC
IL
IH
CI
CC
CC
_ovf
Output Low-voltage (I/O, C4, C8, PRES/INT)
Output High Voltage (C4, C8, PRES/INT)
V
Extra Supply Current
PRES/INT weak pull-up output current
EVCC pin not connected to a power supply
EVCC pin connected to a power supply
Clock signal for AT83C24
Clock signal for AT83C24NDS
Input Low-voltage
Input High Voltage
Output Low-voltage
Input trigger hysteresis
OH
on I/O depends on external pull up value
Card Supply Current Capability
Card Supply Current Overflow:
ICCADJ = 0 (reset value)
Parameter
Parameter
Parameter
ICCADJ = 1
Vpeak - 10 mV
0.8 x EVCC
Min
0.7 x VCC
0.1 x VCC
65
65
66
66
Vpeak -
200mV
Min
300
Min
18
-0.5
4
3
Typ
120
130
Vpeak
Typ
330
Typ
Vpeak + 25 mV
Max
0.3 x VCC
VCC + 0.5
130
150
EVCC
Max
0.05
Max
360
0.4
+3
48
48
1.9
0.4
Unit
mA
mA
Unit
Unit
MHz
MHz
mA
κΩ
V
V
V
V
V
V
V
VCC > 5.35V,
I
I
EVCC from 1.6V to VCC
I
C
Short to VSS
INT_PULLUP = 0: Internal
pull-up active.
C
mA
Vpeak on I/O from 1.6V to
VCC
EAUTO = 1:
min duration 1µs,
min frequency 0.1Hz,
spikes <50ns are filtered.
EAUTO = 1
If DCK[2:0] =0
(CLK=4MHz to 4.61MHz),
a duty cycle of 50% is
needed.
no constrainst on duty
cycle
VCC > 4.5V
VCC <= 4.5V
VCC > 4.5V
VCC <= 4.5V
I
OL
OL =
OH
OL
L
L
VCC from 3 to 5.5V
= 100 nF
= 100 nF, EIcc = +3
= -100 μA
= -3 mA
= 100 μA
Test Conditions
VCC=3V to 5.5V,
-1.2 mA
Test Conditions
Test Conditions
AT83C24
STEPREG=0
STEPREG = 1
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