at89c51ac3-s3sim ATMEL Corporation, at89c51ac3-s3sim Datasheet - Page 80

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at89c51ac3-s3sim

Manufacturer Part Number
at89c51ac3-s3sim
Description
At89c51ac3 Enhanced 8-bit Microcontroller With 64kb Flash Memory
Manufacturer
ATMEL Corporation
Datasheet
Watchdog Programming
80
AT89C51AC3
The three lower bits (S0, S1, S2) located into WDTPRG register permit to program the
WDT duration.
Table 42. Machine Cycle Count
To compute WD Time-Out, the following formula is applied:
Note:
The following table outlines the time-out value for Fosc
Table 43. Time-Out Computation
S2
0
0
0
0
1
1
1
1
S2
0
0
0
0
1
1
1
1
Svalue represents the decimal value of (S2 S1 S0)
FTime Out
S1
0
0
1
1
0
0
1
1
S1
0
0
1
1
0
0
1
1
=
S0
---------------------------------------------------------------- -
12
0
1
0
1
0
1
0
1
×
(
(
2
S0
0
1
0
1
0
1
0
1
14
Fosc = 12 MHz
F
×
131.07 ms
262.14 ms
524.29 ms
16.38 ms
32.77 ms
65.54 ms
wd
2
1.05 s
2.10 s
Svalue
) 1
)
XTAL
Fosc = 16 MHz
Machine Cycle Count
196.56 ms
393.12 ms
786.24 ms
12.28 ms
24.57 ms
49.14 ms
98.28 ms
1.57 s
= 12 MHz in X1 mode
2
2
2
2
2
2
2
2
14
15
17
18
19
20
21
16
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
4383D–8051–02/08
Fosc = 20 MHz
157.28 ms
314.56 ms
629.12 ms
19.66 ms
39.32 ms
78.64 ms
9.82 ms
1.25 s

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