at89c51ac3-s3sim ATMEL Corporation, at89c51ac3-s3sim Datasheet - Page 9

• Manufacturer Part Number: at89c51ac3-s3sim
• Description: At89c51ac3 Enhanced 8-bit Microcontroller With 64kb Flash Memory
• Manufacturer: ATMEL Corporation

Read-Modify-Write
Instructions
4383D–8051–02/08
Figure 3. Port 2 Structure
Notes:
When Port 0 and Port 2 are used for an external memory cycle, an internal control signal
switches the output-driver input from the latch output to the internal address/data line.
Some instructions read the latch data rather than the pin data. The latch based instruc-
tions read the data, modify the data and then rewrite the latch. These are called "Read-
Modify-Write" instructions. Below is a complete list of these special instructions (see
Table ). When the destination operand is a Port or a Port bit, these instructions read the
latch rather than the pin:
It is not obvious the last three instructions in this list are Read-Modify-Write instructions.
These instructions read the port (all 8 bits), modify the specifically addressed bit and
MOV Px.y, C
Instruction
READ
LATCH
INTERNAL
BUS
CLR Px.y
WRITE
TO
LATCH
SET Px.y
READ
PIN
DJNZ
DEC
ORL
ANL
XRL
JBC
CPL
1. Port 2 is precluded from use as general-purpose I/O Ports when as address/data bus
2. Port 2 internal strong pull-ups FET (P1 in FiGURE) assist the logic-one output for
INC
drivers.
memory bus cycle.
Description
logical AND
logical OR
logical EX-OR
jump if bit = 1 and clear bit
complement bit
increment
decrement
decrement and jump if not zero
move carry bit to bit y of Port x
clear bit y of Port x
set bit y of Port x
D
LATCH
P2.X
ADDRESS HIGH/ CONTROL
Q
1
0
Example
ANL P1, A
ORL P2, A
XRL P3, A
JBC P1.1, LABEL
CPL P3.0
INC P2
DEC P2
DJNZ P3, LABEL
MOV P1.5, C
CLR P2.4
SET P3.3
VDD
INTERNAL
PULL-UP (2)
P2.x (1)
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