ds64ev400sqx National Semiconductor Corporation, ds64ev400sqx Datasheet
ds64ev400sqx
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ds64ev400sqx Summary of contents
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... The device uses differential current-mode logic (CML) inputs and outputs, and is available 48-pin leadless LLP package. Power is supplied from either a 2.5V or 3.3V supply. Simplified Application Diagram © 2007 National Semiconductor Corporation Features ■ Equalizes loss at 10 Gbps ■ ...
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Pin Descriptions Pin Name Pin Number I/O, Type HIGH SPEED DIFFERENTIAL I/O IN_0 CML IN_0- 2 IN_1 CML IN_1- 5 IN_2 CML IN_2- 9 IN_3 CML IN_3- 12 OUT_0 CML ...
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Pin Name Pin Number I/O, Type SERIAL MANAGEMENT BUS (SMBus) INTERFACE CONTROL PINS SDA 18 I, CMOS SDC 17 I, CMOS CMOS OTHER Reserv 19, 20 47, 48 Note Input O = Output Connection Diagram ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( CMOS Input Voltage CMOS Output Voltage CML Input/Output Voltage Junction Temperature Storage Temperature Lead ...
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Symbol Parameter V Supply Voltage of Transmitter to DDTX EQ V Input Common-Mode Voltage ICMDC R Differential Input Return Loss LI R Input Resistance IN CML OUTPUTS (OUT_n+, OUT_n- V Output Voltage Swing O V Output Common-Mode Voltage OCM t ...
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Symbol Parameter SIGNAL DETECT and ENABLE TIMING t TRI-STATE to input SD Delay ZISD t Input to Tri-Sate SD Delay IZSD t EN TRI-STATE to Output Delay OZED t EN Output to TRI-STATE Delay ZOED Note 1: “Absolute Maximum Ratings” ...
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Electrical Characteristics — Serial Management Bus Interface Over recommended operating supply and temperature ranges unless other specified. Symbol Parameter SERIAL BUS INTERFACE DC SPECIFICATIONS V Data, Clock Input Low Voltage IL V Data, Clock Input High Voltage IH I Current ...
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Serial Management Bus (SMBus) Configuration Registers The Serial Management Bus interface is compatible to the SMBus 2.0 physical layer specification, except for bus termi- nation voltages. Holding the CS pin high enables the SMBus Name Address Defaul Type t Status ...
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FIGURE 1. Test Setup Diagram FIGURE 2. CML Output Transition Times FIGURE 3. Propagation Delay Timing Diagram 9 30032027 30032002 30032003 www.national.com ...
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FIGURE 4. Signal Detect (SD) Delay Timing Diagram FIGURE 5. Enable (EN) Delay Timing Diagram 10 30032004 30032005 ...
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DS64EV400 Applications Information The DS64EV400 is a programmable quad equalizer opti- mized for operation Gbps for backplane and cable applications. EQUALIZER BOOST CONTROL Each data channel support eight programmable levels of equalization boost. The state of the ...
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SD_ON). A logic Low means that the input signal has fallen below a minimum threshold value (called SD_OFF). These values are programmed via the SMBus (Table 1). If not pro- grammed via the SMBus, the minimum and maximum thresh- olds ...
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A 0.01μF bypass ca- pacitor should be connected to each V capacitor is placed as close as possible to the DS64EV400. Smaller body size capacitors ...
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Figure 12. Equalized Signal (30 In FR4, 10 Gbps, PRBS7, 0x06 Setting) Figure 14. Equalized Signal (32 In Tyco XAUI Backplane, 6.25 Gbps, PRBS7, 0x06 Setting) Figure 15. DJ vs. EQ Setting (10 Gbps) www.national.com 30032012 Figure 13. Equalized Signal ...
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Physical Dimensions inches (millimeters) unless otherwise noted To order lead-free products, call your National Semiconductor distributors. They can order products for you with an "NOPB" specification. For more information on our Lead-free program, please check out our Lead-Free Status page. ...
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... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...